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ics for communications acoustic echo canceller ace psb 2170 version 1.1 data sheet 01.98 ds 1
edition 01.98 this edition was realized using the software system framemaker a . published by siemens ag, hl ts ? siemens ag 1998. all rights reserved. attention please! as far as patents or other rights of third parties are concerned, liability is only assumed for components, not for applications, processes and circuits implemented within components or assemblies. the information describes the type of component and shall not be considered as assured characteristics. terms of delivery and rights to change design reserved. for questions on technology, delivery and prices please contact the semiconductor group offices in germany or the siemens companies and representatives worldwide (see address list). due to technical requirements components may contain dangerous substances. for information on the types in question please contact your nearest siemens office, semiconductor group. siemens ag is an approved cecc manufacturer. packing please use the recycling operators known to you. we can also help you C get in touch with your nearest sales office. by agreement we will take packing material back, if it is sorted. you must bear the costs of transport. for packing material that is returned to us unsorted or which we are not obliged to accept, we shall have to invoice you for any costs incurred. components used in life-support devices or systems must be expressly authorized for such purpose! critical components 1 of the semiconductor group of siemens ag, may only be used in life-support devices or systems 2 with the express written approval of the semiconductor group of siemens ag. 1 a critical component is a component used in a life-support device or system whose failure can reasonably be expected to cause the failure of that life-support device or system, or to affect its safety or effectiveness of that device or system. 2 life support devices or systems are intended (a) to be implanted in the human body, or (b) to support and/or maintain and sustain human life. if they fail, it is reasonable to assume that the health of the user may be en- dangered. psb 2170 revision history: current version: data sheet 01.98 previous version: preliminary data sheet 10.97 page (in previous version) page (in new version) subjects (major changes since last revision) 226 226 scsts description corrected 233 233 sccn1 description corrected
psb 2170 table of contents page semiconductor group 3 01.98 1 overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9 1.1 features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 1.2 pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 1.3 pin definitions and functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 1.4 logic symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15 1.5 functional block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16 1.6 system integration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17 1.6.1 full duplex featurephone for isdn terminal . . . . . . . . . . . . . . . . . . . . . .17 1.6.2 dect basestation with full duplex featurephone . . . . . . . . . . . . . . . . . .18 1.6.3 h.320 videophone with full duplex speakerphone (3.4 khz audio) . . . .19 1.6.4 h.324 videophone with full duplex speakerphone (3.4 khz audio) . . . .21 1.6.5 videophone with external line interface . . . . . . . . . . . . . . . . . . . . . . . . . .23 1.6.6 videophone with software video compression . . . . . . . . . . . . . . . . . . . .24 1.6.7 full duplex speakerphone in car environment . . . . . . . . . . . . . . . . . . . .26 2 functional units . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .427 2.1 full duplex speakerphone . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .29 2.1.1 echo cancellation (fullband mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . .30 2.1.2 echo cancellation (subband mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . .32 2.1.3 echo suppression . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .34 2.1.3.1 speech detector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .36 2.1.3.2 speech comparators (sc) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .39 2.1.3.3 attenuation control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .41 2.1.3.4 echo suppression status output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .42 2.1.3.5 loudhearing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .42 2.1.3.6 automatic gain control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .42 2.1.3.7 fixed gain . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .44 2.1.3.8 mode control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .44 2.2 operation in noisy environment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .46 2.2.1 modes of operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .47 2.2.2 noise controlled adaptation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .48 2.2.2.1 correlation adaptation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .49 2.2.2.2 double talk detection adaptation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .50 2.2.2.3 attenuation reduction adaptation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .51 2.2.2.4 minimal attenuation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .52 2.2.2.5 adaptation timing control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .53 2.2.2.6 loudspeaker gain adaptation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .55 2.2.2.7 comfort noise generator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .56 2.3 line echo cancellation unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .57 2.4 dtmf detector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .58 2.5 call progress tone detector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .59 2.6 alert tone detector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .61 2.7 caller id decoder . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .62
psb 2170 table of contents page semiconductor group 4 01.98 2.8 dtmf generator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .64 2.9 analog interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .65 2.10 digital interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .66 2.11 universal attenuator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .67 2.12 equalizer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .68 2.13 tone generator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .69 3 miscellaneous . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .72 3.1 reset and power down mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .72 3.2 sps control register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .72 3.3 interrupt . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .73 3.4 abort . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .73 3.5 hardware configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .74 3.6 dependencies of modules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .74 4 interfaces. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .75 4.1 iom ? -2 interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .75 4.2 ssdi interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .79 4.2.1 ssdi interface - transmitter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .79 4.2.2 ssdi interface - receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .79 4.3 analog front end interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .81 4.4 serial control interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .83 4.5 general purpose parallel port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .87 4.5.1 static mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .87 4.5.2 multiplex mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .87 5 detailed register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .89 5.1 status register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .89 5.2 hardware configuration registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .91 5.3 read/write registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .95 5.3.1 register table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .95 5.3.2 register naming conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .98 6 electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .236 6.1 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .236 6.2 dc characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .236 6.3 ac characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .237 7 package outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .249
psb 2170 list of figures page semiconductor group 5 01.98 general figure 1: pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 figure 2: logic symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 3: psb 2170 - block diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 4: full duplex featurephone for isdn terminal . . . . . . . . . . . . . . . . . . . . . 17 figure 5: dect basestation with full duplex speakerphone . . . . . . . . . . . . . . . . . 18 figure 6: videophone (isdn, 3.4 khz audio) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 7: h.324 videophone (3.4 khz audio) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 figure 8: videophone with external line interface (hardware video codec) . . . . . 23 figure 9: videophone with external line interface (software video codec). . . . . . 24 figure 10: full duplex speakerphone in car environment . . . . . . . . . . . . . . . . . . . . 26 functional units figure 11: functional units - overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 427 figure 12: speakerphone - signal connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 figure 13: speakerphone - block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 figure 14: echo cancellation unit (fullband mode) - block diagram . . . . . . . . . . . . 30 figure 15: echo cancellation unit - typical room impulse response . . . . . . . . . . . 31 figure 16: echo cancellation unit (subband mode) - block diagram. . . . . . . . . . . . 32 figure 17: echo suppression unit - states of operation. . . . . . . . . . . . . . . . . . . . . . 34 figure 18: echo suppression unit - block diagram . . . . . . . . . . . . . . . . . . . . . . . . . 35 figure 19: speech detector - block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 figure 20: speech comparator - block diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 figure 21: speech comparator - interdependence of parameters . . . . . . . . . . . . . . 40 figure 22: echo suppression unit - automatic gain control. . . . . . . . . . . . . . . . . . . 43 figure 23: comfort noise generator - integration into speakerphone . . . . . . . . . . . 46 figure 24: correlation adaptation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 figure 25: double talk detection adaptation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 figure 26: attenuation reduction adaptation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 figure 27: attenuation timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 figure 28: adaptation of additional attenuation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 figure 29: loudspeaker gain adaptation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 figure 30: line echo cancellation unit - block diagram. . . . . . . . . . . . . . . . . . . . . . 57 figure 31: dtmf detector - block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58 figure 32: call progress tone detector - block diagram . . . . . . . . . . . . . . . . . . . . . 59 figure 33: call progress tone detector- cooked mode . . . . . . . . . . . . . . . . . . . . . . 59 figure 34: alert tone detector - block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61 figure 35: caller id decoder - block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62 figure 36: dtmf generator - block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64 figure 37: analog frontend interface - block diagram . . . . . . . . . . . . . . . . . . . . . . . 65 figure 38: digital interface - block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66 figure 39: universal attenuator - block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . 67 figure 40: equalizer - block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
psb 2170 list of figures page semiconductor group 6 01.98 figure 41: tone generator - block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69 figure 42: tone generator - tone sequences . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 miscellaneous figure 43: operation modes - state chart. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72 interfaces figure 44: iom ? -2 interface - frame structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 figure 45: ssdi/iom ? -2 interface - frame start . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76 figure 46: iom ? -2 interface - single clock mode . . . . . . . . . . . . . . . . . . . . . . . . . . . 76 figure 47: iom ? -2 interface - double clock mode . . . . . . . . . . . . . . . . . . . . . . . . . . 77 figure 48: iom ? -2 interface - channel structure. . . . . . . . . . . . . . . . . . . . . . . . . . . . 78 figure 49: ssdi interface - transmitter timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79 figure 50: ssdi interface - active pulse selection . . . . . . . . . . . . . . . . . . . . . . . . . . 80 figure 51: ssdi interface - receiver timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 figure 52: analog front end interface - frame structure . . . . . . . . . . . . . . . . . . . . . 81 figure 53: analog front end interface - frame start . . . . . . . . . . . . . . . . . . . . . . . . 82 figure 54: analog front end interface - data transfer . . . . . . . . . . . . . . . . . . . . . . . 82 figure 55: status register read access. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83 figure 56: data read access . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84 figure 57: register write access . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84 figure 58: configuration register read access . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85 figure 59: configuration register write access or register read command . . . . . 85 figure 60: general purpose parallel port - multiplex mode . . . . . . . . . . . . . . . . . . . 88 electrical characteristics figure 61: input/output waveforms for ac-tests . . . . . . . . . . . . . . . . . . . . . . . . . . 237 timing diagrams figure 62: oscillator circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 241 figure 63: ssdi/iom ? -2 interface - bit synchronization timing . . . . . . . . . . . . . . . 242 figure 64: ssdi/iom ? -2 interface - frame synchronization timing . . . . . . . . . . . . 242 figure 65: ssdi interface - strobe timing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 244 figure 66: sci interface. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 245 figure 67: analog front end interface. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 246 figure 68: general purpose parallel port - multiplex mode . . . . . . . . . . . . . . . . . . 247 figure 69: reset timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 248
psb 2170 list of tables page semiconductor group 7 01.98 general table 1: pin definitions and functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 table 2: time slot assignment for videophone application. . . . . . . . . . . . . . . . . . .19 functional units table 3: signal summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .428 table 4: echo cancellation modes. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .30 table 5: echo cancellation unit registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .31 table 6: subband mode registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .33 table 7: speech detector parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .38 table 8: speech comparator parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .41 table 9: attenuation control parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .42 table 10: sps encoding . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .42 table 11: automatic gain control parameters. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .44 table 12: fixed gain parameters. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .44 table 13: speakerphone registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .44 table 14: comfort noise - mode control bits. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .47 table 15: comfort noise - modes of operations . . . . . . . . . . . . . . . . . . . . . . . . . . . .47 table 16: low pass register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .48 table 17: correlation adaptation registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .49 table 18: double talk detection adaptation registers . . . . . . . . . . . . . . . . . . . . . . .50 table 19: double talk detection adaptation registers . . . . . . . . . . . . . . . . . . . . . . .51 table 20: minimal attenuation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .52 table 21: adaptation of additional attenuation registers . . . . . . . . . . . . . . . . . . . . .54 table 22: loudspeaker gain adaptation registers . . . . . . . . . . . . . . . . . . . . . . . . . .55 table 23: comfort noise generator registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .56 table 24: line echo cancellation unit registers . . . . . . . . . . . . . . . . . . . . . . . . . . . .57 table 25: dtmf detector control registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .58 table 26: dtmf detector results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .58 table 27: dtmf detector parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .58 table 28: call progress tone detector results . . . . . . . . . . . . . . . . . . . . . . . . . . . . .60 table 29: call progress tone detector registers . . . . . . . . . . . . . . . . . . . . . . . . . . .60 table 30: alert tone detector registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .61 table 31: alert tone detector results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .61 table 32: caller id decoder modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .62 table 33: caller id decoder status . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .62 table 34: caller id decoder registers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .62 table 35: dtmf generator registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .64 table 36: analog frontend interface registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . .65 table 37: digital interface registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .66 table 38: universal attenuator registers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .67 table 39: equalizer registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .68
psb 2170 list of tables page semiconductor group 8 01.98 table 40: tone generator modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .70 table 41: tone generator registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .70 miscellaneous table 42: sps registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .72 table 43: interrupt source summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .73 table 44: dependencies of modules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .74 interfaces table 45: ssdi vs. iom ? -2 interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .75 table 46: iom ? -2 interface registers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .77 table 47: ssdi interface register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .80 table 48: control of als amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .81 table 49: analog front end interface register . . . . . . . . . . . . . . . . . . . . . . . . . . . . .81 table 50: analog front end interface clock cycles. . . . . . . . . . . . . . . . . . . . . . . . . .82 table 51: command words for register access . . . . . . . . . . . . . . . . . . . . . . . . . . . .86 table 52: address field w for configuration register write . . . . . . . . . . . . . . . . . . .86 table 53: address field r for configuration register read . . . . . . . . . . . . . . . . . . .86 table 54: static mode registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .87 table 55: multiplex mode registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .87 table 56: signal encoding . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .98 timing table 57: status register update timing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .240
semiconductor group 9 01.98 psb 2170 overview 1overview general general the psb 2170 provides acoustic echo cancellation for analog and digital featurephones. the chip supports two iom ? -2 compatible channels and a dedicated interface to the psb 4851 (dual codec). it is programmed by a simple four wire serial control interface. the psb 2170 also supports a power down mode and provides interface pins to +5 v levels.
p-mqfp-80 semiconductor group 10 01.98 acoustic echo canceller psb 2170 psb 2170 version 1.1 cmos type ordering code package psb 2170 p-mqfp-80 1.1 features ? two modes of acoustic echo cancellation: 20 db erle @60 ms, <1 ms delay 30 db erle @70-200 ms, 38/43 ms delay ? fast adaptation without learning tone ? comfort noise generator ? line echo cancellation without learning tone ? dmtf tone generation ? flexible ringing generation ? programmable side gain ? transducer correction filters ? dtmf tone detector ? call progress tone detector ? caller id decoder ? general purpose parallel port (16 bits) ? independent gain for all channels ? serial control interface for programming ? 3.3v power supply, 5v interface ?iom ? -2 interface ? interface to psb 4851 ? interface to burst mode controllers
psb 2170 overview semiconductor group 11 01.98 1.2 pin configuration (top view) figure 1 pin configuration 1 10 20 21 30 40 41 60 50 61 70 80 v dda xtal 1 xtal 2 ri ro v ssa sclk sdr v dd afedd afedu v dd v ss v dd v ss afefs afeclk fsc du/dx dd/dr dxst drst v dd v ss dcl ro ri ro ro ro sps 0 sps 1 v dd v ss ri ri gp 3 gp 2 gp 1 gp 0 ri ri ri ri ri v dd v ss v dd v ss v ss v ss ro v dd gp 4 gp 5 gp 6 v dd gp 8 v ss gp 15 v ss gp 7 gp 9 gp 10 v dd gp 12 gp 13 gp 14 v ss gp 11 v ddp rst clk v ss ri v ddp int sdx cs ro ace psb 2170
psb 2170 overview semiconductor group 12 01.98 1.3 pin definitions and functions table 1 pin definitions and functions pin no. p-mqfp-80 symbol dir. reset function 41, 80 v ddp -- power supply (5v %) power supply for the interface. 7, 15, 21, 29, 39, 49, 58, 61, 67, 73 v dd -- power supply (3.3v % ) power supply for logic. 1 v dda -- power supply (3.3v %) power supply for clock generator. 4 v ssa -- power supply (0 v) power supply for clock generator. 9, 16, 22, 30, 40, 48, 57, 59, 60, 78, 66, 72 v ss -- power supply (0 v) ground for logic and interface. 17 afefs o l analog frontend frame sync: 8 khz frame synchronization signal for communication with the analog frontend. 18 afeclk o l analog frontend clock: clock signal for the analog frontend (6.912 mhz). 19 afedd o l analog frontend data downstream: data output to the analog frontend. 20 afedu i - analog frontend data upstream: data input from the analog frontend. 79 rst i - reset: active high reset signal. 23 fsc i - data frame synchronization: 8 khz frame synchronization signal (iom ? -2 and ssdi mode). 24 dcl i - data clock: data clock of the serial data interface. 10 5 5
psb 2170 overview semiconductor group 13 01.98 26 dd/dr i /od i - iom ? -2 compatible mode: receive data from iom ? -2 controlling device. ssdi mode: receive data of the strobed serial data interface. 25 du/dx i /od o/ od - iom ? -2 compatible mode: transmit data to iom ? -2 controlling device. ssdi mode: transmit data of the strobed serial data interface. 27 dxst o l dx strobe: strobe for dx in ssdi interface mode. 28 drst i - dr strobe: strobe for dr in ssdi interface mode. 14 cs i- chip select: select signal of the serial control interface (sci). 11 sclk i - serial clock: clock signal of the serial control interface (sci). 13 sdr i - serial data receive: data input of the serial control interface (sci). 12 sdx o/ od h serial data transmit: data output of the serial control interface (sci). 10 int o/ od h interrupt new status available. 8clki- alternative afeclk source 13,824 mhz 2 3 xtal 1 xtal 2 i o - z oscillator: xtal 1 : external clock or input of oscillator loop. xtal 2 : output of oscillator loop for crystal. 37 38 sps 0 sps 1 o o l l speakerphone state: current speakerphone unit state, general purpose outputs or status register output table 1 pin definitions and functions
psb 2170 overview semiconductor group 14 01.98 1) these lines are driven low with 20 m a during reset. 52 53 54 55 62 63 64 65 68 69 70 71 74 75 76 77 gp 0 gp 1 gp 2 gp 3 gp 4 gp 5 gp 6 gp 7 gp 8 gp 9 gp 10 gp 11 gp 12 gp 13 gp 14 gp 15 i/ o i/ o i/ o i/ o i/ o i/ o i/ o i/ o i/ o i/ o i/ o i/ o i/ o i/ o i/ o i/ o l 1) l l l l l l l l l l l l l l l general purpose parallel port 0-15: general purpose i/o. 6, 32, 33, 34, 35, 36, 56 ro o - reserved output: do not connect. 5, 31, 42, 43, 44, 45, 46, 47, 50, 51 ri i - reserved input: connect to v ss . table 1 pin definitions and functions
psb 2170 overview semiconductor group 15 01.98 1.4 logic symbol 1 figure 2 logic symbol du/dx dd/dr dcl fsc sdx sdr sclk cs iom ? -2 sci afeclk afefs afedu afedd psb psb 2170 xtal 1 xtal 2 rst ssdi 4851 dxst drst parallel port gp 0 -gp 15 int
psb 2170 overview semiconductor group 16 01.98 1.5 functional block diagram figure 3 psb 2170 - block diagram du/dx dd/dr dcl fsc sdx sdr sclk cs afeclk afefs afedu afedd xtal 1 xtal 2 rst dsp reset and timing unit data interface analog frontend interface dxst drst control interface parallel port gp 0 -gp 15 int
psb 2170 overview semiconductor group 17 01.98 1.6 system integration the psb 2170 provides a full duplex speakerphone in a variety of applications.some examples are outlined below. 1.6.1 full duplex featurephone for isdn terminal figure 4 shows an isdn featurephone with the psb 2170 providing a full duplex speakerphone. figure 4 full duplex featurephone for isdn terminal psb 2170 microcontroller 077-3445 iom ? -2 s 0 -bus power controller peb 2023 psb 2161 psb 2186 sci
psb 2170 overview semiconductor group 18 01.98 1.6.2 dect basestation with full duplex featurephone figure 5 shows a dect basestation with acoustic echo cancellation based on the psb 2170. the full duplex featurephone can be switched to the basestation or a mobile handset dynamically. for programming the serial control interface (sci) is used while voice data is transferred via the strobed serial data interface (ssdi). figure 5 dect basestation with full duplex speakerphone psb 2170 psb 4851 microcontroller 077-3445 antenna burstmode controller dect hf line tip/ ring afe sci iom ? -2/ssdi
psb 2170 overview semiconductor group 19 01.98 1.6.3 h.320 videophone with full duplex speakerphone (3.4 khz audio) as shown in figure 6 the psb 2170 can be used to provide a full duplex speakerphone solution for a videophone with 3.4 khz bandwidth. figure 6 videophone (isdn, 3.4 khz audio) in transmit direction the arcofi ba (psb 2161, analog frontend with 8 khz sampling rate) in combination with the acoustic echo canceller (psb 2170) provides the uncompressed audio data from the microphone via iom-2. the iom-2 timeslots could be assigned as shown in table 2. the data is compressed by the jade (psb 7280) or alternatively by the jade mm (psb 7238), multiplexed into the audio/video data stream by the video codec and sent to the line by the isac-s te (psb 2186). in receive direction the video codec demultiplexes table 2 time slot assignment for videophone application logical connection bit width physical channel timeslot name 2161 <-> 2170 16 iom channel 1 ic1/ic2 2170 <-> 7238 16 iom channel 2 ic3/ic4 vid. codec <-> 2186 2*8 iom channel 0 b1,b2 iom ? -2 s 0 -bus video codec bus interface ace psb 2170 isac-s te psb 2186 arcofi ba psb 2161 jade mm psb 7238 sai
psb 2170 overview semiconductor group 20 01.98 the compressed audio data from the data stream delivered by the isac-s te (psb 2186). if desired it also introduces a delay to achieve lip synchronization. the compressed data is sent to the jade/jade mm which in turn sends the audio data after decompression to the ace (psb 2170) which then sends the data to the arcofi ba (psb 2161).
psb 2170 overview semiconductor group 21 01.98 1.6.4 h.324 videophone with full duplex speakerphone (3.4 khz audio) for an analog videophone the psb 2170 provides a full duplex speakerphone according to figure 7. a discrete modem frontend (daa, data access arrangement) is different depending on the country where the application shall be used. thus, although cheap in terms of bill of material, a logistic overhead is necessary to address a world-wide market since several different versions have to be produced. a solution for this problem is also shown in figure 7 using the siemens analog line interface solution (alis, psb 4595/4596) chipset. with the alis the country specific requirements like dc characteristics and impedance matching can be met by simply programming registers. figure 7 h.324 videophone (3.4 khz audio) in transmit direction the psb 2161 (arcofi ba) provides the uncompressed audio data from the microphone to the acoustic echo canceller (psb 2170). the acoustic echo ace iom ? -2 arcofi ba video codec bus interface tip/ring isar 34 alis psb 2161 psb 4596 psb 4595/ psb 2170 jade an psb 7230 psb 7115
psb 2170 overview semiconductor group 22 01.98 canceller provides the echo-free data to the audio compression device jade an (joint audio decoder/encoder for analog applications, psb 7230). the data is then compressed by the jade an and multiplexed into the audio/video data stream by the video codec. the video codec in turn sends the combined data for modulation to the isar 34 (psb 7115) by the m -controller. finally the isar 34 sends the data to the alis (psb 4595/4596) which passes it unmodified to the analog telephone line. in receive direction the same signal path is used in the other direction. the alis chipset is a programmable solution for codec and daa. it can be configured by software to meet the requirements of the different countries, thus offering one hardware solution for all countries. the potential separation is done by capacitors instead of transformers.
psb 2170 overview semiconductor group 23 01.98 1.6.5 videophone with external line interface a videophone using an external line interface with the psb 2170 providing a full duplex speakerphone is shown in figure 8. figure 8 videophone with external line interface (hardware video codec) in transmit direction the psb 2161 (afcofi ba) provides the uncompressed audio data from the microphone to the acoustic echo canceller (psb 2170). the acoustic echo canceller provides the echo-free data to the audio compression device jade mm (psb 7238). the jade mm offers all necessary compression algorithms to cover h.320/323/ 324 applications, i.e. itu-t g.711, g.722, g.723 and g.728. the compressed data is then multiplexed into the audio/video data stream by the video codec. the video codec in turn sends the combined data via the bus interface to a host unit (e.g. the cpu in a pc) which passes it to the line interface (e.g. isac-s te for isdn, v.34bis modem for pots or an ethernet adapter for lan). in receive direction the same signal path is used in the other direction. the off-board line interface offers the advantage of one videophone board applicable to different lines such as isdn (h.320), lan (h.323) or pots (h.324, plain old telephone system) by just exchanging the line interface card and some control software on the pc. iom ? -2 video codec bus interface arcofi ba psb 2161 ace psb 2170 jade mm psb 7238
psb 2170 overview semiconductor group 24 01.98 1.6.6 videophone with software video compression a videophone using software video compression with the psb 2170 providing a full duplex speakerphone is shown in figure 8. figure 9 videophone with external line interface (software video codec) in transmit direction the psb 2161 (afcofi ba) provides the uncompressed audio data from the microphone to the acoustic echo canceller (psb 2170). the acoustic echo canceller provides the echo-free data to the audio compression device jade mm (psb 7238). the jade mm offers all necessary compression algorithms to cover h.320/323/ 324 applications, i.e. itu-t g.711, g.722, g.723 and g.728. the compressed data is then transmitted to the host processor via the bus interface (e.g. using the siemens pci interface szb 6120). the host processor also captures the uncompressed video data through the same bus interface and does the video compression and multiplexing by software. the multiplexed data stream is then passed to the corresponding line interface (e.g. isac-s te for isdn, v.34bis modem for pots or an ethernet adapter for lan). in receive direction the same signal path is used in the other direction. if only h.324 (pots) videophones shall be supported, the jade mm (psb 7238) may be substituted by the jade an (psb 7230), which offers only the itu-t g.723.1 compression needed for h.324. a combi-design of jade mm and jade an is also possible, thus offering both solutions by assembly options. see jade an data sheet for details. iom ? -2 bus interface arcofi ba psb 2161 ace psb 2170 jade mm psb 7238 szb 6120
psb 2170 overview semiconductor group 25 01.98 the off-board line interface offers the advantage of one videophone board applicable to different lines such as isdn (h.320), lan (h.323) or pots (h.324, plain old telephone system) by just exchanging the line interface card and some control software on the pc. due to the limited computational power of the host processor (e.g. intel pentium), the video quality using software compression usually does not reach the quality of a separate video processor. nevertheless, if accepted by the customer this offers a very low cost solution for videoconferencing.
psb 2170 overview semiconductor group 26 01.98 1.6.7 full duplex speakerphone in car environment the psb 2170 has special provisions for operation in noisy environments like cars. in this application the psb 2170 can monitor the background noise and insert similar noise into the transmitted signal when necessary. this feature, called comfort noise generation, reduces unpleasant noise modulation. figure shows an application where the psb 2170 provides a full duplex speakerphone for a mobile communications unit in a car. figure 10 full duplex speakerphone in car environment the psb 2170 receives (transmits) analog data from (to) the mobile communications unit via the first codec of the psb 4851. the microphone and the loudspeaker of the mobile communications unit are muted. instead of them the loudspeaker and microphone mounted in the car are used. they are connected directly to the second channel of the psb 4851. m c psb 4851 psb 2170
psb 2170 functional units semiconductor group 27 01.98 2 functional units functional units functional units the psb 2170 contains several functional units that can be connected to either of the two interfaces (psb 4851 and ssdi/iom?-2) as necessary. figure 11 shows the functional units available within the psb 2170. figure 11 functional units - overview dtmf detector speaker- phone cid decoder psb 4851 ssdi/iom ? -2 iom ? -2 s 1 s 3 s 5 s 7 s 11 s 12 s 4 s 2 s 8 s 6 signal summation: signal sources: s 1 ,...,s 21 channel 1 i 1 i 2 i 3 line side acoustic side sci i 1 i 1 i 2 i 3 i 1 i 2 i 3 channel 2 channel 1 i 3 i 4 i 1 i 2 i 1 i 2 i 3 i 1 i 2 i 3 i 1 alert tone detector i 1 line echo canceller i 1 i 2 s 15 equalizer 2 i 1 s 19 psb 4851 channel 2 equalizer 1 i 1 s 18 tone s 20 universal i 1 s 14 attenuator generator dtmf s 9 generator s 10 cpt detector i 1 s 21
psb 2170 functional units semiconductor group 28 01.98 each unit has one or more signal inputs (denoted by i). most units have at least one signal output (denoted by s). any input i can be connected to any signal output s. in addition to the signals shown in figure 11 there is also the signal s 0 (silence), which is useful at signal summation points. table 3 lists the available signals within the psb 2170 according to their reference points. the following sections describe the functional units in detail. table 3 signal summary signal description s 0 silence s 1 analog line input (channel 1 of psb 4851 interface) s 2 analog line output (channel 1 of psb 4851 interface) s 3 microphone input (channel 2 of psb 4851 interface) s 4 loudspeaker/handset output (channel 2 of psb 4851 interface) s 5 serial interface input, channel 1 s 6 serial interface output, channel 1 s 7 serial interface input, channel 2 s 8 serial interface output, channel 2 s 9 dtmf generator output s 10 dtmf generator auxiliary output s 11 speakerphone output (acoustic side) s 12 speakerphone output (line side) s 13 reserved s 14 universal attenuator output s 15 line echo canceller output s 16 reserved s 17 reserved s 18 equalizer 1 output s 19 equalizer 2 output s 20 tone generator output 1 s 21 tone generator output 2
psb 2170 functional description semiconductor group 29 01.98 2.1 full duplex speakerphone the speakerphone unit (figure 12) is attached to four signals (microphone, loudspeaker, line out and line in). the two input signals (microphone, line in) are preceded by a signal summation point. figure 12 speakerphone - signal connections internally, this unit can be divided into an echo cancellation unit and an echo suppression unit (figure 13). the echo cancellation unit provides the attenuation g c while the echo suppression unit provides the attenuation g s . the total attenuation att of the speakerphone is therefore att=g c +g s . figure 13 speakerphone - block diagram the echo suppression unit is used to provide additional attenuation if the echo cancellation unit cannot provide all of the required attenuation itself. the echo cancellation unit has two operating modes: fullband and subband mode. table 4 shows the basic differences of the two modes. speakerphone s 11 s 12 a c o u s t i c s i d e l i n e s i d e i 2 i 1 i 3 i 4 microphone loudspeaker line out line in echo cancellation line out microphone loudspeaker line in echo suppression g c g s
psb 2170 functional description semiconductor group 30 01.98 2.1.1 echo cancellation (fullband mode) a simplified block diagram of the fullband echo cancellation unit is shown in figure 14. figure 14 echo cancellation unit (fullband mode) - block diagram the echo cancellation unit consists of an finite impulse response filter (fir) that models the expected acoustic echo, an nlms based adaptation unit and a control unit. the expected echo is subtracted from the actual input signal from the microphone. if the model is exact and the echo does not exceed the length of the filter, then the echo can be completely cancelled. however, even if this ideal state can be achieved for one given moment the acoustic echo usually changes over time. therefore the nlms unit continuously adapts the coefficients of the fir filter. this adaptation process is steered by the control unit. as an example, the adaptation is inhibited as long as double talk is detected by the control unit. furthermore the control unit informs the echo suppression unit about the achieved echo return loss. table 5 shows the registers associated with the echo cancellation unit in fullband mode. table 4 echo cancellation modes fullband mode subband mode max. g c 20 db 30 db echo length 16-80 ms >70_200 ms delay < 1 ms 38/43 ms microphone loudspeaker - fir filter nlms control line out line in
psb 2170 functional description semiconductor group 31 01.98 the length of the fir filter can be varied from 127 to 639 taps (16 ms to 80 ms). the taps are grouped into blocks. each block contains 64 taps. the performance of the fir filter can be enhanced by prescaling some or call of the coefficients of the fir filter. a coefficient is prescaled by multiplying it by a constant. the advantage of prescaling is an enhanced precision and consequently an enhanced echo cancellation. the disadvantage is a reduced signal range. more precisely, if a coefficient at tap t i is scaled by a factor c i then the level of the echo (room impulse response) must not exceed max/c i (max: maximum pcm value). as an example figure shows a typical room impulse response. figure 15 echo cancellation unit - typical room impulse response first of all, the echo never exceeds 0.5 of the maximum value. furthermore the echo never exceeds 0.25 of the maximum value after time t 0.25 . therefore all coefficients can be scaled by a factor of 2 and all coefficients for taps corresponding to times after t 0.25 can be scaled a factor of 4. the echo cancellation unit provides three parameters for scaling coefficients. the first parameter (gs) determines a scale for all coefficients. the second parameter (fb) determines the first block for which an additional scale (ps) takes effect. this feature can be used for different default settings like large or small rooms. table 5 echo cancellation unit registers register # of bits name comment saelen 10 len length of fir filter saeatt 15 att attenuation reduction during double-talk saegs 3 gs global scale (all blocks) saeps 3 as partial scale (for blocks >= saeps2:fb) saebl 3 fb first block affected by partial scale t a 0.5 0.25 t 0.25
psb 2170 functional description semiconductor group 32 01.98 2.1.2 echo cancellation (subband mode) a simplified block diagram of the subband echo cancellation unit is shown in figure 16. figure 16 echo cancellation unit (subband mode) - block diagram with the exception of an additional (optional) wiener filter the block diagram is identical to the fullband echo cancellation unit. the subband mode can be enabled in three different submodes. these submodes offer a trade-off between the maximum echo length and the functional units than can be run simultaneously (see chapter 3.6). all units that cannot be run simultaneously must be disabled before the subband echo cancellation unit can be enabled. after the subband echo cancellation unit is disabled, the parameters for the affected units must be rewritten by the microcontroller. for the optional wiener filter both the activation/deactivation time and the maximum attenuation can be programmed. if the wiener filter is enabled, it is only active while there is no speech detected on the near side (microphone). the transition time from the inactive state to the active state (and vice versa) is determined by the parameter wftime. furthermore the maximum attenuation provided by the wiener filter can be limited by the parameter wflimit. as shown in figure 13 the total attenuation provided the speakerphone consists of the attenuation g c (provided by the echo cancellation unit) and g s (provided by the echo suppression unit).in subband mode the attenuation g c is further split into g a (provided by the adaptive filter) and g w (provided by the wiener filter). micro- loudspeaker - fir filter nlms control line line in wf analysis analysis phone out synthesis
psb 2170 functional description semiconductor group 33 01.98 if g a already exceeds wflimit due to good adaptation then the wiener filter is deactivated and g c =g a . otherwise wflimit limits the attenuation g w of the wiener filter such that g c =g a +g w never exceeds wflimit. table 6 shows the registers associated with the subband echo cancellation unit. table 6 subband mode registers register # of bits name comment sctl 2 em echo cancellation mode (fullband, subband) sctl 1 ewf wiener filter enable (subband only) saewft 15 trtime transition time of wiener filter saewfl 15 limit wiener filter attenuation limit saeatt 15 att attenuation reduction during double-talk
psb 2170 functional description semiconductor group 34 01.98 2.1.3 echo suppression the echo suppression unit can be in one of three states: ? transmit state ? receive state ? idle state in transmit state the microphone signal drives the line output while the line input is attenuated. in receive state the loudspeaker signal is driven by the line input while the microphone signal is attenuated. in idle state both signal paths are active with evenly distributed attenuation. figure 17 echo suppression unit - states of operation line out line in microphone loudspeaker idle state line out line in microphone loudspeaker receive state line out line in microphone loudspeaker transmit state
psb 2170 functional description semiconductor group 35 01.98 figure18 shows the signal flow graph of the echo suppression unit in more detail. figure 18 echo suppression unit - block diagram state switching is controlled by the speech comparators (scas, scls) and the speech detectors (sdx, sdr). the amplifiers (agcx, agcr, lgax, lgar) are used to achieve proper signal levels for each state. all blocks are programmable. thus the telephone set can be optimized and adjusted to the particular geometrical and acoustical environment. the following sections discuss each block of the echo suppression unit in detail. scls scas sdx sdr agcr agcx attenuation control line out microphone loudspeaker lgax lgar line in ghx ghr
psb 2170 functional description semiconductor group 36 01.98 2.1.3.1 speech detector for each signal source a speech detector (sdx, sdr) is available. the speech detectors are identical but can be programmed individually. figure 19 shows the signal flow graph of a speech detector. figure 19 speech detector - block diagram the first three units (lim, lp1, pd) are used for preprocessing the signal while the actual speech detection is performed by the background noise monitor. background noise monitor the tasks of the noise monitor are to differentiate voice signals from background noise, even if it exceeds the voice level, and to recognize voice signals without any delay. therefore the background noise monitor consists of the low-pass filter 2 (lp2) and the offset in two separate branches. basically it works on the burst-characteristic of the speech: voice signals consist of short peaks with high power (bursts). in contrast, background noise can be regarded approximately stationary from its average power. low-pass filter 2 provides different time constants for noise (non-detected speech) and speech. it determines the average of the noise reference level. in case of background noise the level at the output of lp2 is approximately the level of the input. as in the other branch an additional offset off is added to the signal, the comparator signals noise. at speech bursts the digital signals arriving at the comparator via the offset branch change faster than those via the lp2-branch. if the difference exceeds the offset off, the lim lp1 pd lp2 off lp1 pds pdn lp2s lp2n lp2l background noise monitor signal preprocessing - lim
psb 2170 functional description semiconductor group 37 01.98 comparator signals speech. therefore the output of the background noise monitor is a digital signal indicating speech (1) or noise (0). a small fade constant (lp2n) enables fast settling of lp2 to the average noise level after the end of speech recognition. however, a too small time constant for lp2n can cause rapid charging to such a high level that after recognizing speech the danger of an unwanted switching back to noise exists. it is recommended to choose a large rising constant (lp2s) so that speech itself charges the lp2 very slowly. generally, it is not recommended to choose an infinite lp2s because then approaching the noise level is disabled. during continuous speech or tones the lp2 will be charged until the limitation lp2l is reached. then the value of lp2 is frozen until a break discharges the lp2. this limitation permits transmission of continuous tones and music on hold. the offset stage represents the estimated difference between the speech signal and averaged noise. signal preprocessing as described in the preceding chapter, the background noise monitor is able to discriminate between speech and noise. in very short speech pauses e.g. between two words, however, it changes immediately to non-speech, which is equal to noise. therefore a peak detection is required in front of the noise monitor. the main task of the peak detector (pd) is to bridge the very short speech pauses during a monolog so that this time constant has to be long. furthermore, the speech bursts are stored so that a sure speech detection is guaranteed. but if no speech is recognized the noise low-pass lp2 must be charged faster to the average noise level. in addition, the noise edges are to be smoothed. therefore two time constants are necessary. as the peak detector is very sensitive to spikes, the low-pass lp1 filters the incoming signal containing noise in a way that main spikes are eliminated. due to the programmable time constant it is possible to refuse high-energy sibilants and noise edges. to compress the speech signals in their amplitudes and to ease the detection of speech, the signals have to be companded logarithmically. hereby, the speech detector should not be influenced by the system noise which is always present but should discriminate between speech and background noise. the limitation of the logarithmic amplifier can be programmed via the parameter lim. lim is related to the maximum pcm level. a signal exceeding the limitation defined by lim is getting amplified logarithmically, while very smooth system noise below is neglected. it should be the level of the minimum system noise which is always existing; in the transmit path the noise generated by the telephone circuitry itself and in receive direction the level of the first bit which is stable without any speech signal at the receive path. table 9 shows the parameters for the speech detector.
psb 2170 functional description semiconductor group 38 01.98 the input signal of the speech detector can be connected to either the input signal of the echo suppression unit (as shown for sdx) or the output of the associated agc (as shown for sdr). table 7 speech detector parameters parameter # of bytes range comment lim 1 0 to 95 db limitation of log. amplifier off 1 0 to 95 db level offset up to detected noise pds 1 1 to 2000 ms peak decrement pd1 (speech) pdn 1 1 to 2000 ms peak decrement pd1 (noise) lp1 1 1 to 2000 ms time constant lp1 lp2s 1 2 to 250 s time constant lp2 (speech) lp2n 1 1 to 2000 ms time constant lp2 (noise) lp2l 1 0 to 95 db maximum value of lp2
psb 2170 functional description semiconductor group 39 01.98 2.1.3.2 speech comparators (sc) the echo suppression unit has two identical speech comparators (scas, scls). each comparator can be programmed individually to accommodate the different system characteristics of the acoustic interface and the line interface. as scas and scls are identical, the following description holds for both scas and scls. the sc has two input signals sx and sr, which map to microphone/loudspeaker for scas and line in/line out for scls. in principle, the sc works according to the following equation: therefore, scas controls the switching to transmit state and scls controls the switching to receive state. switching is done only if sx exceeds sr by at least the expected acoustic level enhancement v which is divided into two parts: g and gd. a block diagram of the sc is shown in figure 20. figure 20 speech comparator - block diagram at both inputs, logarithmic amplifiers compress the signal range. hence after the required signal processing for controlling the acoustic echo, pure logarithmic levels on both paths are compared. the main task of the comparator is to control the echo. the internal coupling due to the direct sound and mechanical resonances are covered by g. the external coupling, mainly caused by the acoustic feedback, is controlled by gd/pd. if sx > sr + v then switch state g gds gdn pds pdn sx sr log. amp. base gain gain reserve peak decrement log. amp. pds pdn peak decrement
psb 2170 functional description semiconductor group 40 01.98 the base gain (g) corresponds to the terminal couplings of the complete telephone: g is the measured or calculated level enhancement between both receive and transmit inputs of the sc. to control the acoustic feedback two parameters are necessary: gd represents the actual reserve on the measured g. together with the peak decrement (pd) it simulates the echo behavior at the acoustic side: after speech has ended there is a short time during which hard couplings through the mechanics and resonances and the direct echo are present. till the end of that time ( d t ) the level enhancement v must be at least equal to g to prevent clipping caused by these internal couplings. then, only the acoustic feedback is present. this coupling, however, is reduced by air attenuation. for this in general the longer the delay, the smaller the echo being valid. this echo behavior is featured by the decrement pd. figure 21 speech comparator - interdependence of parameters according to figure 21, a compromise between the reserve gd and the decrement pd has to be made: a smaller reserve (gd) above the level enhancement g requires a longer time to decrease (pd). it is easy to overshout the other side but the intercommunication is harder because after the end of the speech, the level of the estimated echo has to be exceeded. in contrary, with a higher reserve (gd*) it is harder to overshout continuous speech or tones, but it enables a faster intercommunication because of a stronger decrement (pd*). t db d t gd* gd pd* pd rx-speech rx-noise g g
psb 2170 functional description semiconductor group 41 01.98 two pairs of coefficients, gds/pds when speech is detected, and gdn/pdn in case of noise, offer a different echo handling for speech and non-speech. with speech, even if very strong resonances are present, the performance will not be worsened by the high gds needed. only when speech is detected, a high reserve prevents clipping. a time period et [ms] after speech end, the parameters of the comparator are switched to the noise values. if both sets of the parameters are equal, et has no function. 2.1.3.3 attenuation control the attenuation control unit controls the attenuation stages ghx and ghr and performs state switching. the programmable attenuation att is completely switched to ghx (ghr) in receive state (transmit state). in idle state both ghx and ghr attenuate by att/2. in addition, attenuation is also influenced by the automatic gain control stages (agcx, agcr). state switching depends on the signals of one speech comparator and the corresponding speech detector. while each state is associated with the programmed attenuation, the time is takes to reach the steady-state attenuation after a state switch can be programmed (t sw ). if the current state is either transmit or receive and no speech on either side has been detected for time t w then idle state is entered. to smoothen the transition, the attenuation is incremented (decremented) by ds until the evenly distribution att/2 for both ghx and ghr is reached. table 9 shows the parameters for the attenuation unit. note that t sw is dependant on the current attenuation by the formula . table 8 speech comparator parameters parameter # of bytes range comment g 1 C 48 to + 48 db base gain gds 1 0 to 48 db gain reserve (speech) pds 1 0.025 to 6 db/ms peak decrement (speech) gdn 1 0 to 48 db gain reserve (noise) pdn 1 0.025 to 6 db/ms peak decrement (noise) et 1 0 to 992 ms time to switch from speech to noise parameters t sw sw att =
psb 2170 functional description semiconductor group 42 01.98 note: in addition, attenuation is also influenced by the automatic gain control stages (agcx, agcr) in order to keep the total loop attenuation constant. 2.1.3.4 echo suppression status output the psb 4860 can report the current state of the echo suppression unit to ease the optimization of the parameter set of the echo suppression unit. in this case the sps 0 and sps 1 pins are set according to table 10. furthermore the controller can read the current value of the sps pins by reading register spsctl. 2.1.3.5 loudhearing the speakerphone unit can also be used for controlled loudhearing. if enabled in loudhearing mode, the loudspeaker amplifier of the psb 4851 (als) is used instead of ghr when appropriate to avoid oscillation. in order to enable this feature, the psb 4851 must be programmed to allow als override. the als field within the afe control register afectl defines the value sent to the psb 4851 if attenuation is necessary. 2.1.3.6 automatic gain control the echo suppression unit has two identical automatic gain control units (agcx, agcr). operation of the agc depends on a threshold level defined by the parameter com (value relative to the maximum pcm-value). the regulation speed is controlled by table 9 attenuation control parameters parameter # of bytes range comment tw 1 16 ms to 4 s t w to return to idle state att 1 0 to 95 db attenuation for ghx and ghr ds 1 0.6 to 680 ms/db decay speed (to idle state) sw 1 0.0052 to 10 ms/db decay rate (used for t sw ) table 10 sps encoding sps 0 sps 1 echo suppression unit state 0 0 no echo suppression operation 0 1 receive 1 0 transmit 11idle
psb 2170 functional description semiconductor group 43 01.98 speedh for signal amplitudes above the threshold and speedl for amplitudes below. usually speedh will be chosen to be at least 10 times faster than speedl. the bold line in figure 22 depicts the steady-state output level of the agc as a function of the input level. figure 22 echo suppression unit - automatic gain control for reasons of physiological acceptance the agc gain is automatically reduced in case of continuous background noise (e.g. by ventilators). the reduction is programmed via the nols parameter. when the noise level exceeds the threshold determined by nois, the amplification will be reduced by the same amount the noise level is above the threshold. the current gain/attenuation of the agc can be read at any time. an additional low pass with time constant lpa is provided to avoid an immediate response of the agc to very short signal bursts. the agcx is not working in the receive state. in this case the last gain setting is used. regulation starts with this value as soon as receive state is left. likewise, agcr is not working in transmit state. in this case the last gain setting is used. regulation starts with this value as soon transmit state is left. when the agc has been disabled the initial gain used immediately after enabling the agc can be programmed. table 11 shows the parameters of the agc. com ag_att ag_gain agc input level agc output level max. pcm -10 db -20 db -10 db -20 db example: com ag_gain ag_att = = = -30 db 15 db 20 db
psb 2170 functional description semiconductor group 44 01.98 2.1.3.7 fixed gain each signal path features an additional amplifier (lgax, lgar) that can be set to a fixed gain. these amplifiers should be used for the basic amplification in order to avoid saturation in the preceding stages. table 12 shows the only parameter of this stage. 2.1.3.8 mode control table 13 shows the registers used to determine the signal sources and the mode. table 11 automatic gain control parameters parameter # of bytes range comment ag_init 1 -95 db to 95db initial agc gain/attenuation com 1 0 to C 95 db compare level rel. to max. pcm-value ag_att 1 0 to -95 db attenuation range ag_gain 1 0 to 95 db gain range ag_cur 1 -95 db to 95 db current gain/attenuation speedl 1 0.25 to 62.5 db/s change rate for lower levels speedh 1 0.25 to 62.5 db/s change rate for higher levels nois 1 0 to C 95 db threshold for agc-reduction by background noise lpa 1 0.025 to 16 ms agc low pass time constant table 12 fixed gain parameters parameter # of bytes range comment lga 1 -12 db to 12 db always active table 13 speakerphone registers register # of bits name comment sctl 1 ens echo suppression unit enable sctl 1 enc echo cancellation unit enable sctl 1 md speakerphone or loudhearing mode sctl 1 agx agcx enable sctl 1 agr agcr enable sctl 1 sdx sdx input tap sctl 1 sdr sdr input tap
psb 2170 functional description semiconductor group 45 01.98 afectl 4 als als value for loudhearing ssrc1 5 i1 input signal 1 (microphone) ssrc1 5 i2 input signal 2 (microphone) ssrc2 5 i3 input signal 3 (line in) ssrc2 5 i4 input signal 4 (line in) table 13 speakerphone registers
psb 2170 functional description semiconductor group 46 01.98 2.2 operation in noisy environment the full duplex speakerphone can be augmented by a comfort noise generator which can enhance the performance of the speakerphone in noisy environments. the purpose of the comfort noise is to reduce signal modulation when the echo suppression unit switches the attenuation.the principle of operation is as follows: as long as the echo suppression unit is transmit state no additional noise is added to the outgoing signal. in this state there is already the natural noise transmitted to the line. in addition the comfort noise generator estimates the noise at the microphone input when no speech is detected by either of the three speech detectors (sd, sdx, sdr). once the echo suppression unit switches to receive or idle state the comfort noise generator generates noise similar to the external noise and adds this noise to the outgoing signal. figure 23 shows the integration of the comfort noise generator into the speakerphone. figure 23 comfort noise generator - integration into speakerphone if the new blocks (sd/lp, state/control, comfort noise and lspg) are removed the remaining blocks resemble the speakerphone as shown in figures 16 and 18. therefore the comfort noise generator can be viewed as an optional extension to the speakerphone. the speech detector sdr should be fed by the same signal as agcr if the adaptive loudspeaker gain (lspg) is used (see 2.2.2.6). control fir nlms wf lgax ghx agcx scas sdx agcr scls lspg sdr lgar ghr control - lp state/control sd comfort noise
psb 2170 functional description semiconductor group 47 01.98 2.2.1 modes of operation for enhanced operation in noisy environments the speakerphone of the psb 2170 provides two modes of operation: 1. noise controlled adaptation 2. noise controlled adaptation and comfort noise generation if the echo cancellation unit is used in subband mode then it is mandatory to reduce the number of taps. the tables 14 and 15 summarize the available modes and the associated register settings. 1) dont care in fullband mode the parameters for noise controlled adaptation and comfort noise generation must be programmed prior to activation if either the call progress tone detector or the caller id decoder have been used. nad, red and cn must be only set if the echo cancellation unit is also enabled. after comfort noise is disabled the parameters for the dtmf detector, the caller id decoder, the alert tone detector, the call progress tone detector and the line echo canceller must be reprogrammed. table 14 comfort noise - mode control bits register # of bits name comment sctl 1 nad noise adaptation sctl 1 red tap reduction (subband only) sctl 1 cn comfort noise table 15 comfort noise - modes of operations nad red 1) cn mode 0 0 0 normal speakerphone 1 0 0 speakerphone with noise controlled adaptation, cpt and cid must be disabled 1 1 0 speakerphone with noise controlled adaptation and reduced filter length (car application) 1 1 1 speakerphone with noise controlled adaptation and comfort noise generation
psb 2170 functional description semiconductor group 48 01.98 2.2.2 noise controlled adaptation the purpose of the noise controlled adaptation is to reduce the effects of the echo suppression unit (half-duplex speakerphone) and to minimize the effect of wrong adaptations of the echo cancellation unit (full-duplex speakerphone) in noisy environments. the three core blocks of the noise controlled adaptation are the speech detector/ low pass (sd/lp) the state/control block and the adaptive loudspeaker gain (lspg). the speech detector is used to detect speech in the input signal (microphone). the speech detector has the same structure and parameters as the speech detectors sdx and sdr (see chapter 2.1.3.1). however, the parameters used for the speech detector are usually set to different values compared with sdx and sdr. the low pass is used to determine the energy of the microphone signal. it has only the time constant as a programmable parameter (table 16). therefore the output of the sd/lp block is the information, whether noise is present (no speech detected by sd) and the current noise level (estimated by lp). the speech detector should be programmed more sensitive (in terms of detecting speech) than sdx or sdr. the noise level is used for several calculations performed by the state/control block. it is referred to by the variable l where needed. table 16 low pass register register # of bits name comment sclpt 15 tc time constant for the low pass
psb 2170 functional description semiconductor group 49 01.98 2.2.2.1 correlation adaptation the attenuation achieved by the echo cancellation unit is measured only when the correlation of the loudspeaker and microphone signal exceeds a threshold t. in a noisy environment the correlation will decrease even if the echo cancellation unit is fully adapted. therefore the threshold t might not be exceeded in this situation. as a result the echo cancellation unit would not report any achieved echo return loss enhancement and thus the echo suppression unit would have to switch all of the desired attenuation. to avoid this situation the threshold t can be adjusted dynamically with the noise level l . figure 24 shows the available parameters for the adaptation of the threshold. figure 24 correlation adaptation as long as the noise level l is less than the threshold nth the threshold t remains at its programmed value. once the threshold exceeded, the threshold decreases with the programmable slope cs. however, the threshold will not fall below the programmable limit limit even if the noise level l increases further. table 17 shows the registers associated with the threshold adaptation. table 17 correlation adaptation registers register # of bits name comment sccr 14 corr factor c sccrn 15 nth noise threshold sccrs 12 cs slope sccrl 14 limit limit for c l t limit nth cs corr
psb 2170 functional description semiconductor group 50 01.98 2.2.2.2 double talk detection adaptation during double talk the necessary echo return loss for comfortable full duplex conversation may be reduced. the psb 2170 provides the parameter saeatt:att for this purpose. in subband mode double talk is detected when the difference between the signal before and after the echo cancellation (subtraction point) suddenly decreases by an amount d . the noisier the environment gets the smaller the amount d should be. otherwise the echo cancellation would fail to detect the relatively smaller change which indicates a double talk detection. figure 25 shows the provisions made by the psb 2170 for an adaptive double talk detection. figure 25 double talk detection adaptation as long as the noise level l is less than the threshold nth the necessary difference dtd remains at its programmed value. once the threshold exceeded, dtd decreases with the programmable slope dts. however, it will not fall below the programmable limit limit even if the noise level l increases further. table 18 shows the registers associated with the double talk detection adaptation. in fullband mode double talk is detected if the difference of the expected and the measured error signal exceeds a threshold. in this mode dtd should be set to 0x0400 and limit to 0xfc00. table 18 double talk detection adaptation registers register # of bits name comment scdt 15 dtd difference dtd scdtn 15 nth noise threshold scdts 12 dts slope scdtl 15 limit limit for dtd l d limit nth dts dtd
psb 2170 functional description semiconductor group 51 01.98 2.2.2.3 attenuation reduction adaptation in noisy environments it is acceptable to reduce the overall attenuation as the noise level increases. this is due to the fact that the noise already presents some kind of local talk. hence an increased echo is not perceived as disturbing as in a silent environment. in order to exploit this the psb 2170 provides an attenuation decrease dependent on the noise level. figure 26 shows the attenuation reduction provided by the psb 2170. figure 26 attenuation reduction adaptation as long as the noise level l is less than the threshold nth the overall attenuation is not reduced at all. once the threshold exceeded, the overall attenuation is decreased more and more by increasing atr. the sensitivity is programmable by the parameter as. however, it will not exceed the programmable limit limit even if the noise level l increases further. table 20 shows the registers associated with the double talk detection adaptation. table 19 double talk detection adaptation registers register # of bits name comment scattn 15 nth noise threshold scatts 15 as attenuation sensitivity scattl 15 limit limit for dtd l atr limit nth as
psb 2170 functional description semiconductor group 52 01.98 2.2.2.4 minimal attenuation in case of a significant change of the characteristics of the acoustics the attenuation reported by the echo cancellation unit may be too high until it has adapted itself again. if, in addition, double talk or attenuation reduction atr is in effect then the remaining attenuation for the echo suppression might be to low to avoid echoes. therefore a maximal echo return loss enhancement reported by the echo cancellation unit can be programmed by the parameter glimit. table 20 minimal attenuation register # of bits name comment scaecl 15 glimit global limit for attenuation
psb 2170 functional description semiconductor group 53 01.98 2.2.2.5 adaptation timing control while there is no signal (sdr=0 and sdx=0) at all the echo cancellation unit cannot adapt to changes of the acoustic characteristics of the room. therefore it is quite likely that after an extended period of silence the echo cancellation unit is not very well adapted any more. therefore there may be some echo remaining during the adaptation time once there is a signal (sdr=1) again. in order to minimize this short periods of audible echo the psb 2170 can increase the additional attenuation provided by the echo suppression unit according to figure 27. figure 27 attenuation timing first of all a signal gap (both sides) of at least time gt is needed. otherwise no additional attenuation a will be added dynamically. once the time gt has been exceeded and a signal at the far end (sdr=1, scas=0) only has been detected, an additional attenuation a will be provided by the echo suppression unit. both the attack speed asp and the maximum value att are programmable. the maximum value will be inserted for a duration of at most mt. then the additional attenuation is reduced again with the programmable decay speed dsp until is zero again. if during this process double talk is detected (scas=1) then the decay phase is entered immediately as shown by the dotted line in figure 27. the maximum value att itself can be reduced automatically in accordance with the noise level as shown in figure 28. figure 28 adaptation of additional attenuation t a sdr=1 scas=0 att scas=1 mt l a nth sts att
psb 2170 functional description semiconductor group 54 01.98 table 21 shows the registers associated with the adaptation timing control. example: as an example the following values for the parameters are used: the noise level is -55 db, at t=0 conversation ceases, at t=3 s the far end speaker starts to talk and at t=4 s the local speaker also starts to speak. first of all the minimal gap time (1 s) is exceeded by the signal gap of 3 s and therefore the adaptation timing control is activated. as soon as the far end speaker starts to speak (sdr=1) while the local speaker is silent (scas=0) the additional attenuation starts to rise with the programmed attack speed (1 db/ms). the maximum value for the additional attenuation is 20 db-5 db=15 db. the first term is the parameter att. the second term (5 db) is the adapted attenuation. the noise threshold nth is exceeded by 5 db by the actual noise. as the sensitivity sts is 1 db -1 , 5 db are subtracted from att. at 1 db/ms, this value is reached after 15 ms. then the attenuation remains constant until the local speaker also starts to speak. then the additional attenuation decreases by 6 db/ms. therefore after 3 ms the additional attenuation is 0 db again. table 21 adaptation of additional attenuation registers register # of bits name comment scstgp 16 gt minimal gap time scstatt 15 att maximal attenuation scstnl 15 nth noise threshold scsts 12 sts noise sensitivity scsttim 16 mt maximum attenuation time for att scstis 15 asp attack speed scstds 16 dsp decay speed register name value scstgp gt 1 s scstatt att 20 db scstnl nth -60 db scsts sts 1 db -1 scsttim mt 2 s scstis asp 1 db/ms scstds dsp 6 db/ms
psb 2170 functional description semiconductor group 55 01.98 2.2.2.6 loudspeaker gain adaptation in noisy environments it is useful to automatically increase the signal level of the loudspeaker output whenever the noise level increases. the psb 2170 features such an automatic gain adaptation by the gain stage lspg. figure 29 shows the adaptive gain provided by the psb 2170. figure 29 loudspeaker gain adaptation as long as the noise level l is less than the threshold nth there is no additional gain. once the threshold exceeded, the gain g is increased with the programmable sensitivity gs. however, it will not exceed the programmable limit limit even if the noise level l increases further. the level of the signal fed into the speech detector sdr should not vary with the adaptive gain provided by lspg. therefore it is recommended to set sctl:sdr=1. table 22 shows the registers associated with the double talk detection adaptation. note: the total attenuation programmed for the speakerphone in register satt1:att is not automatically increased when the gain of lspg increases. therefore the attenuation reduction (chapter 2.2.2.3) should be reduced accordingly. table 22 loudspeaker gain adaptation registers register # of bits name comment sclspn 15 nth noise threshold sclsps 15 gs gain sensitivity sclspl 15 limit limit for g l g limit nth gs
psb 2170 functional description semiconductor group 56 01.98 2.2.2.7 comfort noise generator the comfort noise generator adapts itself to the currently present noise at the input signal with respect to the energy level and the spectrum. furthermore it is possible to program a constant noise level which is always present (even if there is no noise at the input signal present). there are only three parameters for this block: 1. the adaptation speed lp 2. the constant noise level const 3. the factor fac by which the present noise is scaled for the output of the noise generator. table 23 shows the associated registers. table 23 comfort noise generator registers register # of bits name comment sccn1 15 const level of constant noise sccn2 15 fac factor for multiplication sccn3 15 lp adaptation time constant
psb 2170 functional description semiconductor group 57 01.98 2.3 line echo cancellation unit the psb 2170 contains an adaptive line echo cancellation unit for the cancellation of near end echoes. a block diagram is shown in figure 30. figure 30 line echo cancellation unit - block diagram the line echo canceller provides only one outgoing signal (s 15 ) as the other outgoing signal would be identical with the input signal i 1 . input i 2 is usually connected to the line input while input i 1 is connected to the outgoing signal. the adaptation process can be controlled by three parameters: min, att and mgn. adaptation takes only place if both of the following conditions hold: 1. 2. with the first condition adaptation to small signals can be avoided. the second condition avoids adaptation during double talk. the parameter att represents the echo loss provided by external circuitry. the adaptation stops if the power of the received signal (i2) exceeds the power of the expected signal (i1-att) by more than the margin mgn. table 24 shows the registers associated with the line echo canceller. table 24 line echo cancellation unit registers register # of bits name comment lecctl 1 en line echo canceller enable lecctl 5 i1 input signal selection for i 1 lecctl 5 i2 input signal selection for i 2 leclev 15 min minimal power for signal i 1 lecatt 15 att externally provided attenuation (i 1 to i 2 ) lecmgn 15 mgn margin for double talk detection + - s adaptive filter i 2 s 15 i 1 i1 min > i1 i2 Cattmgn + C0 >
psb 2170 functional description semiconductor group 58 01.98 2.4 dtmf detector figure 31 shows a block diagram of the dtmf detector. the results of the detector are available in the status register and a dedicated result register that can be read via the serial control interface (sci) by the external controller. figure 31 dtmf detector - block diagram table 25 shows the supported modes and the input signal selection. as soon as a valid dtmf tone is recognized, the status word and the dtmf tone code are updated (table 26). dtv is set when a standard dtmf tone is recognized and reset when no dtmf tone is recognized or the detector is disabled. the code for the dtmf tone is placed into the register ddctl. the registers ddtw and ddlev hold parameters for detection (table 27). table 25 dtmf detector control registers register # of bits name comment ddctl 1 en dtmf detector enable ddctl 5 i1 input signal selection table 26 dtmf detector results register # of bits name comment status 1 dtv dtmf code valid ddctl 5 dtc dtmf tone code (valid until replaced by new code) table 27 dtmf detector parameters register # of bits name comment ddtw 15 twist twist for dtmf recognition ddlev 6 min minimum signal level to detect dtmf tones dtmf sci i 1 recognition
psb 2170 functional description semiconductor group 59 01.98 2.5 call progress tone detector the selected signal is monitored continuously for a call progress tone. the cpt detector consists of a band-pass and an optional timing checker (figure 32). figure 32 call progress tone detector - block diagram the cpt detector can be used in two modes: raw and cooked. in raw mode, the occurrence of a signal within the frequency, time and energy limits is directly reported. the timing checker is bypassed and therefore the psb 2170 does not interpret the length or interval of the signal. in cooked mode, the number and duration of signal bursts are interpreted by the timing checker. a signal burst followed by a gap is called a cycle. the cpt flag is set with the first burst after the programmed number of cycles has been detected. the cpt flag remains set until the unit is disabled or speech is detected, even if the conditions are not met anymore. in this mode the cpt is modelled as a sequence of identical bursts separated by gaps with identical length. the psb 2170 can be programmed to accept a range for both the burst and the gap. it is also possible to specify a maximum aberration of two consecutive bursts (gaps). figure 33 shows the parameters for a single cycle (burst and gap). figure 33 call progress tone detector- cooked mode timing band-pass sci (status) i 1 300-640 hz checker t pmax t pmin t gmin t gmax
psb 2170 functional description semiconductor group 60 01.98 the status bit is defined as follows: cpt is not affected by reading the status word. it is automatically reset when the unit is disabled. table 29 shows the control register for the cpt detector. if any condition is violated during a sequence of cycles the timing checker is reset and restarts with the next valid burst. note: in cooked mode cpt is set with the first burst after the programmed number of cycles has been detected. if cpttr:num = 2, then cpt is set with the third signal burst. note: the number of cycles must be set to zero in raw mode. table 28 call progress tone detector results register # of bits name comment status 1 cpt cp tone currently detected [340 hz; 640 hz] table 29 call progress tone detector registers register # of bits name comment cptctl 1 en unit enable cptctl 1 md mode (cooked, raw) cptctl 5 i1 input signal selection cptmn 8 minb minimum time of a signal burst (t pmin ) cptmn 8 ming minimum time of a signal gap (t gmin ) cptmx 8 maxb maximum time of a signal burst (t pmax ) cptmx 8 maxg maximum time of a signal gap (t gmax ) cptdt 8 difb maximum difference between consecutive bursts cptdt 8 difg maximum difference between consecutive gaps cpttr 3 num number of cycles (cooked mode), 0 (raw mode) cpttr 8 min minimum signal level to detect tones cpttr 4 sn minimal signal-to-noise ratio
psb 2170 functional description semiconductor group 61 01.98 2.6 alert tone detector the alert tone detector can detect the standard alert tones (2130 hz and 2750 hz) for caller id protocols. the results of the detector are available in the status register and the dedicated register atdctl0 that can be read via the serial control interface (sci) by the external controller. figure 34 alert tone detector - block diagram as soon as a valid alert tone is recognized, the status word of the psb 2170 and the code for the detected combination of alert tones are updated (table 31). for fast reaction time the necessary gap time (until status:atv is reset after the end of an alert tone) can be reduced by setting atdctl:gt. however, this also reduces robustness against speech. therefore atdctl1:gt should be only set for alert tone detection if there is no speech signal present e.g.. on-hook condition). table 30 alert tone detector registers register # of bits name comment atdctl0 1 en alert tone detector enable atdctl0 5 i1 input signal selection atdctl1 1 md detection of dual tones or single tones atdctl1 1 gt gap time atdctl1 1 dev maximum deviation (0.5% or 1.1%) atdctl1 8 min minimum signal level to detect alert tones table 31 alert tone detector results register # of bits name comment status 1 atv alert tone detected atdctl0 2 atc alert tone code alert tone sci i 1 detector
psb 2170 functional description semiconductor group 62 01.98 2.7 caller id decoder the caller id decoder is basically a 1200 baud modem (fsk, demodulation only). the bit stream is formatted by a subsequent uart and the data is available in a data register along with status information (figure 35). figure 35 caller id decoder - block diagram the fsk demodulator supports two modes according to table 32. the appropriate mode is detected automatically. the cid decoder does not interpret the data received. each byte received is placed into the cidctl register (table 34). the status byte of the psb 2170 is updated (table 33). cia and cd are cleared when the unit is disabled. in addition, cia is cleared when cidctl0 is read. table 32 caller id decoder modes mode mark (hz) space (hz) comment 1 1200 2200 bellcore 2 1300 2100 v.23 table 33 caller id decoder status register # of bits name comment status 1 cia cid byte received status 1 cd carrier detected table 34 caller id decoder registers register # of bits name comment cidctl0 1 en unit enable cidctl0 5 i1 input signal selection cidctl0 8 data last cid data byte received uart fsk demod. sci (status, data) i 1 (bellcore, v.23)
psb 2170 functional description semiconductor group 63 01.98 when the cid unit is enabled, it first waits for a channel seizure signal consisting of a series of alternating space and mark signals. the number of spaces and marks that have to be received without errors before the psb 2170 reports a carrier detect can be programmed. channel seizure must be followed by at least 16 continuous mark signals. the first space signal detected is then regarded as the start bit of the first message byte. the interpretation of the data, including message type, length and checksum is completely left to the controller. the cid unit should be disabled as soon as the complete information has been received as it cannot detect the end of the transmission by itself. note: some caller id mechanism may require additional external components for dc coupling. these tasks must be handled by the controller. note: the controller is responsible for selecting and storing parts of the cid as needed. cidctl1 5 nmss number of mark/space sequences necessary for successful detection of carrier detect cidctl1 6 nmb number of mark bits necessary before space of first byte after carrier detect cidctl1 5 min minimum signal level for cid detection table 34 caller id decoder registers register # of bits name comment
psb 2170 functional description semiconductor group 64 01.98 2.8 dtmf generator the dtmf generator can generate single or dual tones with programmable frequency and gain. this unit is primarily used to generate the common dtmf tones but can also be used for signalling or other user defined tones. a block diagram is shown in figure 36. figure 36 dtmf generator - block diagram both generators and amplifiers are identical. there are two modes for programming the generators, cooked mode and raw mode. in cooked mode, dtmf tones are generated by programming a single 4 bit code. in raw mode, the frequency of each generator/ amplifier can be programmed individually by a separate register. the unit has two outputs which provide the same signal but with individually programmable attenuation. table 35 shows the parameters of this unit. note: dgf1 and dgf2 are undefined when cooked mode is used and must not be written. table 35 dtmf generator registers register # of bits name comment dgctl 1 en enable for generators dgctl 1 md mode (cooked/raw) dgctl 4 dtc dtmf code (cooked mode) dgf1 15 frq1 frequency of generator 1 dgf2 15 frq2 frequency of generator 2 dgl 7 lev1 level of signal for generator 1 dgl 7 lev2 level of signal for generator 2 dgatt 8 att1 attenuation of s 9 dgatt 8 att2 attenuation of s 10 f 1 f 2 generator generator gain1 gain2 att2 s 9 s 10 att1
psb 2170 functional description semiconductor group 65 01.98 2.9 analog interface there are two identical interfaces at the analog side (to psb 4851) as shown in figure 37. figure 37 analog frontend interface - block diagram for each signal an amplifier is provided for level adjustment. the ingoing signals can be passed through an optional high-pass (hp). furthermore, up to three signals can be mixed in order to generate the outgoing signals (s 2 ,s 4 ). table 36 shows the associated registers. table 36 analog frontend interface registers register # of bits name comment ifg1 16 ig1 gain for ig1 ifg2 16 ig2 gain for ig2 ifs1 1 hp high-pass for s 1 ifs1 5 i1 input signal 1 for ig2 ifs1 5 i2 input signal 2 for ig2 ifs1 5 i3 input signal 3 for ig2 ifg3 16 ig3 gain for ig3 ifg4 16 ig4 gain for ig4 ifs2 1 hp high-pass for s 3 ifs2 5 i1 input signal 1 for ig4 ifs2 5 i2 input signal 2 for ig4 ifs2 5 i3 input signal 3 for ig4 channel 2 s 1 channel 1 s 2 i 1 i 2 i 3 line out line in ig1 ig2 s 3 s 4 i 1 i 2 i 3 loudspeaker microphone ig4 hp ig3 hp
psb 2170 functional description semiconductor group 66 01.98 2.10 digital interface there are two almost identical interfaces at the digital side as shown in figure 38. the only difference between these two interfaces is that only channel 1 supports the ssdi mode. figure 38 digital interface - block diagram each outgoing signal can be the sum of two signals with no attenuation and one signal with programmable attenuation (att). the attenuator can be used for artificial echo loss. each input can be passed through an optional high-pass (hp). the associated registers are shown in table 37. table 37 digital interface registers register # of bits name comment ifs3 5 i1 input signal 1 for s 6 ifs3 5 i2 input signal 2 for s 6 ifs3 5 i3 input signal 3 for s 6 ifs3 1 hp high-pass for s 5 ifs4 5 i1 input signal 1 for s 8 ifs4 5 i2 input signal 2 for s 8 ifs4 5 i3 input signal 3 for s 8 ifs4 1 hp high-pass for s 7 channel 2 (iom ? -2 interface) channel 1 (ssdi/iom ? -2 interface) s 7 s 8 i 1 i 2 i 3 att2 hp s 5 s 6 i 1 i 2 i 3 att1 hp
psb 2170 functional description semiconductor group 67 01.98 2.11 universal attenuator the psb 2170 contains an universal attenuator that can be connected to any signal (e.g. for sidetone gain). figure 39 universal attenuator - block diagram table 38 shows the associated register. ifg5 8 att1 attenuation for input signal i3 (channel 1) ifg5 8 att2 attenuation for input signal i3 (channel 2) table 38 universal attenuator registers register # of bits name comment ua 8 att attenuation for ua ua 5 i1 input signal for ua table 37 digital interface registers register # of bits name comment s 14 ua i 1
psb 2170 functional description semiconductor group 68 01.98 2.12 equalizer the psb 2170 contains two identical equalizers which can be programmed individually. each equalizer can be inserted into any signal path. the main application for the equalizer is the adaptation to the frequency characteristics of the microphone, transducer or loudspeaker. each equalizer consists of an iir filter followed by an fir filter as shown in figure 40. figure 40 equalizer - block diagram the coefficients a 1 -a 9 , b 2 -b 9 and c 1 belong to the iir filter, the coefficients d 1- d 17 and c 2 belong to the fir filter. table 39 shows the registers associated with the first equalizer (s 18 ). the second equalizer (s 19 ) is programmed by the registers fcfctl2 and fcfcof2, respectively table 39 equalizer registers register # of bits name comment fcfctl1 1 en enable fcfctl1 5 i input signal for equalizer z -1 z -1 z -1 a1 a2 a9 z -1 z -1 z -1 c1 b2 b9 z -1 z -1 z -1 d1 d2 d17 c2 s 18 /s 19 i fir iir
psb 2170 functional description semiconductor group 69 01.98 due to the multitude of coefficients the uses an indirect addressing scheme for reading or writing an individual coefficient. the address of the coefficient is given by adr and the actual value is read or written to register fcfcof1. in order to ease programming the psb 2170 automatically increments the address adr after each access to fcfcof1. note: any access to an out-of-range address automatically resets fcfctl1:adr. 2.13 tone generator the psb 2170 contains a universal tone generator which can be used for tone alerting, call progress tones or other audible feedback tones. figure 41 shows a block diagram of this unit. figure 41 tone generator - block diagram the heart of this unit are the four independent sine/square wave generators that can generate individually programmable frequencies (f 1 , f 2 , f 3 , f 4 ). each generator has an associated amplifier (g 1 , g 2 , g 3 , g 4 ). the dynamic behavior of the tone generator is controlled by the beat generator. fcfctl1 6 adr filter coefficient address fcfcof1 16 filter coefficient data table 39 equalizer registers register # of bits name comment control generator t on , t off beat generator automatic stop t 1 , t 2 , t 3 sine/square wave generators f 1 , f 2 , f 3, f 4 gain g 1 , g 2 , g 3, g 4 go 1 go 2 s 20 s 21
psb 2170 functional description semiconductor group 70 01.98 if the beat generator is enabled, then the output is either a three tone cadence or a two tone caddence as shown in figure 42. figure 42 tone generator - tone sequences the duration of each frequency is defined by t 1 , t 2 and t 3 . for each timeslot either the associated frequency can be generated or a frequency pair (table 40). if the beat generator is disabled, then the output is a continuous signal of either f 1 , f 2 , f 1 +f 4 , f 2 +f 4 or silence. the control generator is used to enable the beat generator (during t on ) and disable it during t off . with the automatic stop feature the cadence generation the beat generator stops not immediately but after the end of a cadence (either t 2 or t 3 ). this avoids unpleasant sounds when stopping the tone generator unit. table 41 shows the registers associated with the tone and ringing generator. table 40 tone generator modes timeslot option 1 option 2 t 1 f 1 f 1 +f 4 t 2 f 2 f 2 +f 4 t 3 f 3 f 3 +f 4 table 41 tone generator registers register # of bits name comment status 1 act status bit (tone generator on/off) tgctl 2 cgm control generator mode tgctl 1 dt dual tone enable (f4 on/off) tgctl 2 bgm beat generator mode (f1, f2, f1/f2 or f1/f2/f3) tgctl 1 sm stop mode (immediate or automatic) t 1 t 2 f 1 f 2 t 1 t 2 t 3 f 1 f 2 f 3 t 1 t 2 t 3 f 1 f 2 f 3 t 1 t 2 f 1 f 2 t 1 t 2 f 1 f 2 f f tt three tone cadence two tone cadence
psb 2170 functional description semiconductor group 71 01.98 this unit has two outputs (s 20 and s 21 ). the signal level of these outputs can be programmed individually by the preceeding gain stages (go 1 and go 2 ). tgctl 1 wf waveform (sine or square) tgton 16 t on tgtoff 16 t off tgt1 16 t 1 tgt2 16 t 2 tgt3 16 t 3 tgf1 15 f 1 tgf2 15 f 2 tgf3 15 f 3 tgf4 15 f 4 tgg1 15 g 1 tgg2 15 g 2 tgg3 15 g 3 tgg4 15 g 4 tggo1 15 go 1 tggo2 15 go 2 table 41 tone generator registers register # of bits name comment
psb 2170 miscellaneous semiconductor group 72 01.98 3 miscellaneous miscellaneous miscellaneous 3.1 reset and power down mode the psb 2170 can be in either reset mode, power down mode or active mode. during reset the psb 2170 clears the hardware configuration registers and stops both internal and external activity. with the first access to a read/write register the psb 2170 enters active mode. in this mode the main oscillator is running and normal operation takes place. the psb 2170 can be brought to power down mode by programming over the sci interface. in power down mode the main oscillator is stopped. the psb 2170 enters active mode again upon an access to a read/write register. figure 43 shows a state chart of the modes of the psb 2170. figure 43 operation modes - state chart 3.2 sps control register the two sps outputs (sps 0 , sps 1 ) can be used as either general purpose outputs or as indicators for the speakerphone state according to table 42. table 42 sps registers register # of bits name comment spsctl 1 sp0 output value of sps 0 spsctl 1 sp1 output value of sps 1 spsctl 3 mode mode of operation (direct, speakerphone) reset active mode power down mode mode cctrl.pd=1 r/w reg. access rst=1 rst=1 r/w reg. access
psb 2170 miscellaneous semiconductor group 73 01.98 3.3 interrupt the psb 2170 can generate an interrupt to inform the host of an update of the status register according to table 43. an interrupt mask register (intm) can be used to disable or enable the interrupting capability of each bit of the status register individually. an interrupt is internally generated if any combination of these events occurs an. the interrupt is cleared when the host reads the status register. if a new event occurs while the host reads the status register, the status register is updated after the current access is terminated and a new interrupt is generated immediately after the access has ended. note: an interrupt is not generated if the microcontroller has started a command and reads the status register with the already updated content. therefore the controller should always evaluate the relevant bits of the status register after reading it. 3.4 abort if the psb 2170 detects a corrupted configuration (e.g. due to a transient loss of power) it stops operation and initializes all read/write registers to their reset state. the psb 2170 discards all commands with the exception of a write command to the revision register 1) en=0 denotes unit disable table 43 interrupt source summary status (old) status (new) set by reset by rdy=0 rdy=1 command completed command issued cia=0 cia=1 new caller id byte available cidctl0 read or en=0 1) cd=0 cd=1 carrier detected carrier lost or en=0 cd=1 cd=0 carrier lost or en=0 carrier detected act=1 act=0 tone generator active tone sequence finished or en=0 dtv=0 dtv=1 dtmf tone detected dtmf tone lost or en=0 dtv=1 dtv=0 dtmf tone lost or en=0 dtmf tone detected atv=0 atv=1 alert tone detected alert tone lost or en=0 atv=1 atv=0 alert tone lost or en=0 alert tone detected cpt=0 cpt=1 call progress tone detected cpt lost cpt=1 cpt=0 call progress tone lost or speech detected cpt detected
psb 2170 miscellaneous semiconductor group 74 01.98 while abt is set. only after the write command to the revision register (with any value) the abt bit is reset and a reinitialization can take place. 3.5 hardware configuration the psb 2170 can be adapted to various external hardware configurations by two special registers: hwconfig0 and hwconfig1. these registers are written once during initialization and must not be changed while the psb 2170 is in active mode. 3.6 dependencies of modules there are some restrictions concerning the modules that can be enabled at the same time (table 44). a checked cell indicates that the two modules (defined by the row and the column of the cell) must not be enabled at the same time. 1) modules can be enabled at the same time. however, deactivation requires proper sequence: first the echo cancellation unit must be disabled, then the dtmf detector. table 44 dependencies of modules subband (normal) subband (isdn) subband (enhanced) subband (reduced) fullband comfort noise noise adaptation dtmf detector caller id alert tone detector cpt detector line echo canceller equalizer, dtmf, tone subband (normal) xxxxx x subband (isdn) x xxxxxxxxxx subband (enhanced) xx xxxxxxxxxx subband (reduced) xxx x 1) fullband xxxx comfort noise xxx xxxxx noise adaptation xx x x dtmf detector xxx 1) x caller id xx xx x alert tone detector xx x x cpt detector xx xx line echo canceller xx x equalizer 1/2, dtmf/tone generator x
psb 2170 interfaces semiconductor group 75 01.98 4 interfaces interfaces interfaces this section describes the interfaces of the psb 2170. the psb 2170 supports both an iom ? -2 interface with single and double clock mode and a strobed serial data interface (ssdi). however, these two interfaces cannot be used simultaneously as they share some pins. both interfaces are for data transfer only and cannot be used for programming the psb 2170. table 45 lists the features of the two alternative interfaces. 4.1 iom ? -2 interface the data stream is partitioned into packets called frames. each frame is divided into a fixed number of timeslots. each timeslot is used to transfer 8 bits. figure 44 shows a commonly used terminal mode (three channels ch 0 , ch 1 and ch 2 with four timeslots each). figure 44 iom ? -2 interface - frame structure the signal fsc is used to indicate the start of a frame. figure 45 shows as an example two valid fsc-signals (fsc, fsc * ) which both indicate the same clock cycle as the first clock cycle of a new frame (t 1 ). table 45 ssdi vs. iom ? -2 interface iom ? -2 ssdi signals 4 6 channels (bidirectional) 2 1 code linear pcm, a-law, m -law linear pcm (16 bit) synchronization within frame by timeslot (programmable) by signal (dxst, drst) b1 m0 b2 fsc dd/du ch 0 ch 1 ch 2 125 m s ci0 ic1 m1 ic2 ci1 ic4 ic3
psb 2170 interfaces semiconductor group 76 01.98 figure 45 ssdi/iom ? -2 interface - frame start the psb 2170 supports both single clock mode and double clock mode. in single clock mode, the bit rate is equal to the clock rate. bits are shifted out with the rising edge of dcl and sampled at the falling edge. in double clock mode, the clock runs at twice the bit rate. therefore for each bit there are two clock cycles. bits are shifted out with the rising edge of the first clock cycle and sampled with the falling edge of the second clock cycle. figure 46 shows the timing for single clock mode and figure 47 shows the timing for double clock mode. figure 46 iom ? -2 interface - single clock mode dcl fsc fsc * t 1 t 2 dcl t 1 t 2 dd/dr du/dx bit 0 bit 1 bit 2 bit 0 bit 1 bit 2
psb 2170 interfaces semiconductor group 77 01.98 figure 47 iom ? -2 interface - double clock mode the psb 2170 supports up to two channels simultaneously for data transfer. both the coding (pcm or linear) and the data direction (dd/du assignment for transmit/receive) can be programmed individually for each channel. table 46 shows the registers used for configuration of the iom ? -2 interface. in a-law or m -law mode, only 8 bits are transferred and therefore only one timeslot is needed for a channel. in linear mode, 16 bits are needed for a single channel. in this mode, two consecutive timeslots are used for data transfer. bits 8 to 15 are transferred within the first timeslot and bits 0 to 7 are transferred within the next timeslot. the first table 46 iom ? -2 interface registers register # of bits name comment sdconf 1 en interface enable sdconf 1 dcl selection of clock mode sdconf 6 nts number of timeslots within frame sdchn1 1 en channel 1 enable sdchn1 6 ts first timeslot (channel 1) sdchn1 1 dd data direction (channel 1) sdchn1 1 pcm 8 bit code or 16 bit linear pcm (channel 1) sdchn1 1 pcd 8 bit code (a-law or m -law, channel 1) sdchn2 1 en channel 2 enable sdchn2 6 ts first timeslot (channel 2) sdchn2 1 dd data direction (channel 2) sdchn2 1 pcm 8 bit code or 16 bit linear pcm (channel 2) sdchn2 1 pcd 8 bit code (a-law or m -law, channel 2) dcl t 1 dd/dr du/dx bit 0 bit 1 bit 2 bit 0 bit 1 t 2 t 3 t 4 t 5
psb 2170 interfaces semiconductor group 78 01.98 timeslot must have an even number. figure 48 shows as an example a single channel in linear mode occupying timeslots 2 and 3. each frame consists of six timeslots and single clock mode is used. figure 48 iom ? -2 interface - channel structure at this rate the data is shifted out with the rising edge of the clock and sampled at the falling edge. the data clock runs at 384 khz (six timeslots with 8 bit each within 125 m s). fsc dd/du d 15 d 10 d 11 d 12 d 13 d 14 d 9 d 8 d 7 d 6 d 5 d 4 d 2 d 1 d 0 d 3
psb 2170 interfaces semiconductor group 79 01.98 4.2 ssdi interface the ssdi interface is intended for seamless connection to low-cost burst mode controllers (e.g. pmb 27251) and supports a single channel in each direction. the data stream is partitioned into frames. within each frame one 16 bit value can be sent and received by the psb 2170. the start of a frame is indicated by the rising edge of fsc. data is always latched at the falling edge of dcl and output at the rising edge of dcl. the ssdi transmitter and receiver are operating independently of each other except that both use the same fsc and dcl signal. 4.2.1 ssdi interface - transmitter the psb 2170 indicates outgoing data (on signal dx) by activating dxst for 16 clocks. the signal dxst is activated with the same rising edge of dcl that is used to send the first bit (bit 15) of the data. dxst is deactivated with the first rising edge of dcl after the last bit has been transferred. the psb 2170 drives the signal dx only when dxst is activated. figure 49 shows the timing for the transmitter. figure 49 ssdi interface - transmitter timing 4.2.2 ssdi interface - receiver valid data is indicated by an active drst pulse. each drst pulse must last for exactly 16 dcl clocks. as there may be more than one drst pulses within a single frame the psb 2170 can be programmed to listen to the n-th pulse with n ranging from 1 to 16. in order to detect the first pulse properly, drst must not be active at the rising edge of fsc. in figure 51 the psb 2170 is listening to the third drst pulse (n=3). fsc 125 m s dxst dcl du/dx bit 15 bit 14 bit 1 bit 0
psb 2170 interfaces semiconductor group 80 01.98 figure 50 ssdi interface - active pulse selection figure 51 shows the timing for the ssdi receiver. figure 51 ssdi interface - receiver timing table 47 shows the registers used for configuration of the ssdi interface. table 47 ssdi interface register register # of bits name comment sdchn1 4 nas number of active drst strobe fsc drst active pulse (n=3) fsc 125 m s drst dcl dd/dr bit 15 bit 14 bit 1 bit 0
psb 2170 interfaces semiconductor group 81 01.98 4.3 analog front end interface the psb 2170 uses a four wire interface similar to the iom ? -2 interface to exchange information with the analog front end (psb 4851). the main difference is that all timeslots and the channel assignments are fixed as shown in figure 52. . figure 52 analog front end interface - frame structure voice data is transferred in 16 bit linear coding in two bidirectional channels c 1 and c 2 . an auxiliary channel c 3 is used to transfer the current setting of the loudspeaker amplifier als to the psb 2170. the remaining bits are fixed to zero. in the other direction c 3 transfers an override value for als from the psb 2170 to the psb 4851. an additional override bit ov determines if the currently transmitted value should override the aoar:lsc 1) setting. the aoar:lsc setting is not affected by c 3 :als override. table 48 shows the source control of the gain for the als amplifier. furthermore the afe interface can be enabled or disabled according to table 49. 1) see specification of psb 4851 table 48 control of als amplifier aopr:ovre c 3 :ov gain of als amplifier 0 - aoar:lsc 1 0 aoar:lsc 11c 3 :als table 49 analog front end interface register register # of bits name comment afectl 1 en interface enable channel c 1 channel c 3 channel c 2 afefs afedd 125 m s als afedu unused 000ov 16 bit 16 bit 8 bit
psb 2170 interfaces semiconductor group 82 01.98 figure 53 analog front end interface - frame start figure 53 shows the synchronization of a frame by afefs. the first clock of a new frame (t 1 ) is indicated by afefs switching from low to high before the falling edge of t 1 . afefs may remain high during subsequent cycles up to t 32 . figure 54 analog front end interface - data transfer the data is shifted out with the rising edge of afeclk and sampled at the falling edge of afeclk (figure 54). if aopr:ovre is not set, the channel c 3 is not used by the psb 4851. all values (c 1 , c 2 , c 3 :als) are transferred msb first. the data clock (afeclk) rate is fixed at 6.912 mhz. table 50 shows the clock cycles used for the three channels. table 50 analog front end interface clock cycles clock cycles afedd (driven by psb 2170) afedu (driven by psb 4851) t 1 -t 16 c 1 data c 1 data t 17 -t 32 c 2 data c 2 data t 33 -t 40 c 3 data c 3 data t 41 -t 864 0 tristate afeclk afefs t 1 t 2 afeclk t 1 t 2 afedd afedu bit 0 bit 1 bit 2 bit 0 bit 1 bit 2
psb 2170 interfaces semiconductor group 83 01.98 4.4 serial control interface the serial control interface (sci) uses four lines. data is transferred by the lines sdr and sdx at the rate given by sclk. the falling edge of cs indicates the beginning of an access. data is sampled by the psb 2170 at the rising edge of sclk and shifted out at the falling edge of sclk. each access must be terminated by a rising edge of cs. data to and from the psb 2170 is transferred in words (16 bits). a word is considered valid after every 16th rising edge of sclk. the accesses to the psb 2170 can be divided into three classes: ? configuration read/write ? status/data read ? register read/write if the psb 2170 is in power down mode, a read access to the status register does not deliver valid data with the exception of the rdy bit. after the status has been read the access can be either terminated or extended to read data from the psb 2170. a register read/write access can only be performed when the psb 2170 is ready. the rdy bit in the status register provides this information. any access to the psb 2170 starts with the transfer of 16 bits to the psb 2170 over line sdr. this first word specifies the access class, access type (read or write) and, if necessary, the register accessed. if a configuration register is written, the first word also includes the data and the access is terminated. likewise, if a register read is issued, the access is terminated after the first word (figure 59). all other accesses continue by the transfer of the status register from the psb 2170 over line sdx. if a register (excluding configuration) is to be written, the next 16 bits containing the data are transferred over line sdr and the access is terminated. figures 55 to 58 show the timing diagrams for the different access classes and types to the psb 2170. figure 55 status register read access cs sclk sdr c 15 c 14 c 1 c 0 s 15 s 14 s 1 s 0 sdx c 15 ,..,c 0 : s 15 ,..,s 0 : command word for status register read : status register of psb 2170 :
psb 2170 interfaces semiconductor group 84 01.98 figure 56 data read access figure 57 register write access cs sclk sdr c 15 c 14 c 1 c 0 s 15 s 14 s 1 s 0 sdx c 15 ,..,c 0 : s 15 ,..,s 0 : command word for data read status register of psb 2170 : d 15 d 14 d 1 d 0 d 15 ,..,d 0 : data to be read : cs sclk sdr c 15 c 14 c 1 c 0 s 15 s 14 s 1 s 0 sdx c 15 ,..,c 0 : s 15 ,..,s 0 : command word for register write : status register of psb 2170 : d 15 d 14 d 1 d 0 d 15 ,..,d 0 : data to be written :
psb 2170 interfaces semiconductor group 85 01.98 figure 58 configuration register read access the configuration register 0 uses bit positions d 15 -d 8 while the configuration register 1 uses bit positions d 7 -d 0 . figure 59 configuration register write access or register read command the internal interrupt signal is cleared when the first bit of the status register is put on sdx. however, externally the signal int is deactivated as long as cs stays low. if the internal interrupt signal is not cleared or another event causing an interrupt occurs while the microcontroller is already reading the status belonging to the first event then int goes low again immediately after cs is removed. table 51 shows the formats of the different command words. all other command words are reserved. cs sclk sdr c 15 c 14 c 1 c 0 sdx c 15 ,..,c 0 : s 15 ,..,s 0 : command word for configuration register read : status register of psb 2170 : d 15 ,..,d 0 : data to be read : s 15 s 14 s 1 s 0 d 15 d 14 d 1 d 0 cs sclk sdr c 15 c 14 c 1 c 0 c 15 ,..,c 0 : command word for configuration register write : or register read :
psb 2170 interfaces semiconductor group 86 01.98 in case of a configuration register write, w determines which configuration register is to be written (table 52): in case of a configuration register read, r determines which pair of configuration registers is to be read (table 53): note: reading any register except the status register or a hardware configuration register requires at least two accesses. the first access is a register read command (figure 59). with this access the register address is transferred to the. after that access data read accesses (figure 56) must be executed. the first data read access with status:rdy=1 delivers the value of the register. table 51 command words for register access 1514131211109876543210 read status register or data read access 0011000000000000 read register 0101 reg write register 0100 reg read configuration reg. 011100r000000000 write configuration reg. 011000 w data table 52 address field w for configuration register write 9 8 register 0 0 hwconfig 0 0 1 hwconfig 1 1 0 hwconfig 2 1 1 hwconfig 3 table 53 address field r for configuration register read 9 register pair 0 hwconfig 0 / hwconfig 1 1 hwconfig 2 / hwconfig 3
psb 2170 interfaces semiconductor group 87 01.98 4.5 general purpose parallel port the psb 2170 provides a general purpose parallel port (gp 0 to gp 15 ). the m c can read/ write each line individually. this port has two modes: static mode and multiplex mode. 4.5.1 static mode in static mode all pins of the general parallel port have identical functionality. any pin can be configured as an output or an input. pins configured as outputs provide a static signal as programmed by the controller. pins configured as inputs are monitoring the signal continuously without latching. the controller always reads the current value. table 54 shows the registers used for static mode. 4.5.2 multiplex mode in multiplex mode, the psb 2170 uses gp 12 -gp 15 to distinguish four timeslots. each timeslot has a duration of approximately 2 ms. the timeslots are separated by a gap of approximately 125 m s in which none of the signals at gp 12 -gp 15 are active. the psb 2170 multiplexes three more output registers to ma 0 -ma 11 in timeslots 0, 1 and 2. in timeslot 3 the direction of the pins can be programmed. for input pins, the signal is latched at the falling edge of ma 15 . table 55 shows the registers used for multiplex mode. table 54 static mode registers register # of bits comment cctl 2 enable port dout3 16 output signals (for pins configured as outputs) din 16 input signals (for pins configured as inputs) ddir 16 pin direction table 55 multiplex mode registers register # of bits comment cctl 2 enable port dout0 12 output signals on gp 0 -gp 11 while gp 15 =1 dout1 12 output signals on gp 0 -gp 11 while gp 14 =1 dout2 12 output signals on gp 0 -gp 11 while gp 13 =1 dout3 12 output signals (for pins configured as outputs) while gp 12 =1 din 12 input signals (for pins configured as inputs) at falling edge of gp 12 ddir 12 pin direction during gp 12 =1
psb 2170 interfaces semiconductor group 88 01.98 figure 60 shows the timing diagram for multiplex mode. figure 60 general purpose parallel port - multiplex mode note: in either mode the voltage on any pin (gp 0 to gp 15 ) must not exceed v dd. 2 ms gp 15 gp 14 gp 13 gp 12 gp 0 -gp 11 dout0 dout2 dout1 dout0 din/dout3
psb 2170 detailed register description semiconductor group 89 01.98 5 detailed register description the psb 2170 has a single status register (read only) and an array of data registers (read/write). the purpose of the status register is to inform the external microcontroller of important status changes of the psb 2170 and to provide a handshake mechanism for data register reading or writing. if the psb 2170 generates an interrupt, the status register contains the reason of the interrupt. 5.1 status register rdy ready 0: the last command (if any) is still in progress. 1: the last command has been executed. note: if the psb 2170 aborts a running command due to external conditions (e.g. power drop-out, emv) other than reset, it generates an interrupt and resets rdy. in this case the microcontroller should check the abt bit to avoid locking the system. abt abort 0: no exception during operation 1: some exception other than reset caused the psb 2170 to abort any operation currently in progress. the external microcontroller should reinitialize the psb 2170 to ensure proper operation. the abt bit is cleared by writing any value to register rev. no other command is accepted by the psb 2170 while abt is set. cia caller id available 0: no new data for caller id 1: new caller id byte available cd carrier detect 0: no carrier detected 1: carrier detected cpt call progress tone 0: currently no call progress tone detected or pause detected (raw mode) 15 0 rdy abt 0 0 cia cd cpt 0 0 0 0 dtv atv act 0 0
psb 2170 detailed register description semiconductor group 90 01.98 1: currently a call progress is detected dtv dtmf tone valid 0: no new dtmf code available 1: new dtmf code available in ddctl atv alert tone valid 0: no new alert tone code available 1: new alert tone code available in atdctl0 act tone generator status 0: tone generator not running 1: tone generator running
psb 2170 detailed register description semiconductor group 91 01.98 5.2 hardware configuration registers hwconfig 0 - hardware configuration register 0 ppsdx push/pull for sdx 0: the sdx pin has open-drain characteristic 1: the sdx pin has push/pull characteristic ppint push/pull for int 0: the int pin has open-drain characteristic 1: the int pin has push/pull characteristic ppsdi push/pull for sdi interface 0: the du and dd pins have open-drain characteristic 1: the du and dd pins have push/pull characteristic acs afe clock source 0: afeclk is derived from the main oscillator 1: afeclk is derived from the clk input pd power down (read only) 0: the psb 2170 is in active mode 1: the psb 2170 is in power down mode 7 0 pd acs 0 0 ppsdi 0 ppint ppsdx
psb 2170 detailed register description semiconductor group 92 01.98 hwconfig 1 - hardware configuration register 1 gpp general purpose parallel port act afe clock tracking 0: afeclk tracking disabled 1: afeclk tracking enabled ads afe double speed 0: 8 khz afefsc 1: 16 khz afefsc mfs master frame sync selection 0: afefsc 1: fsc xtal xtal frequency selection ssdi ssdi interface selection 0: iom ? -2 interface 1: ssdi interface 7 0 gpp act ads mfs xtal ssdi 7 6 description 0 0 reserved 0 1 app static mode 1 0 app multiplex mode 1 1 reserved 2 1 description 0 0 reserved 0 1 31.104 mhz 1 0 27.648 mhz 1 1 reserved
psb 2170 detailed register description semiconductor group 93 01.98 hwconfig 2 - hardware configuration register 2 esdx edge select for dx 0: dx is transmitted with the rising edge of dcl 1: dx is transmitted with the falling edge of dcl esdr edge select for dr 0: dr is latched with the falling edge of dcl 1: dr is latched with the rising edge of dcl 7 0 0 esdx esdr 0 0 0 00
psb 2170 detailed register description semiconductor group 94 01.98 hwconfig 3 - hardware configuration register 3 cm1 clock master 1 0: clock generation at afefs and afeclk disabled 1: clock generation at afefs and afeclk enabled cm0 clock master 0 0: 512 khz (afeclk) 1: 1.536 mhz (afeclk) 7 0 000000cm1cm0
psb 2170 detailed register description semiconductor group 95 01.98 5.3 read/write registers the following sections contains all read/write registers of the psb 2170. the register addresses are given as hexadecimal values. registers marked with an r are affected by reset or a wake up after power down. all other registers retain their previous value. no access must be made to addresses other than those associated with a read/write register. 5.3.1 register table address. name long name page 00h rev revision.............................................................................. 100 01h r cctl chip control ....................................................................... 101 02h r intm interrupt mask register ...................................................... 102 03h r afectl analog front end interface control.................................... 103 04h r ifs1 interface select 1 ............................................................... 104 05h r ifg1 interface gain 1.................................................................. 105 06h r ifg2 interface gain 2.................................................................. 106 07h r ifs2 interface select 2 ............................................................... 107 08h r ifg3 interface gain 3.................................................................. 108 09h r ifg4 interface gain 4.................................................................. 109 0ah r sdconf serial data interface configuration .................................... 110 0bh r sdchn1 serial data interface channel 1 ......................................... 111 0chr ifs3 interface select 3 ............................................................... 113 0dhr sdchn2 serial data interface channel 2 ......................................... 114 0eh r ifs4 interface select 4 ............................................................... 115 0fh r ifg5 interface gain 5.................................................................. 116 10h r ua universal attenuator........................................................... 117 11h r dgctl dtmf generator control.................................................... 118 12h dgf1 dtmf generator frequency 1 ........................................... 119 13h dgf2 dtmf generator frequency 2 ........................................... 120 14h dgl dtmf generator level....................................................... 121 15h dgatt dtmf generator attenuation ............................................. 122 1ah r atdctl0 alert tone detection 0........................................................ 123 1bh atdctl1 alert tone detection 1........................................................ 124 1chr cidctl0 caller id control 0.............................................................. 125 1dh cidctl1 caller id control 1.............................................................. 126 20h r cptctl call progress tone control ................................................ 127 21h cpttr call progress tone thresholds.......................................... 128 22h cptmn cpt minimum times.......................................................... 129 23h cptmx cpt maximum times......................................................... 130 24h cptdt cpt delta times ................................................................ 131 25h r lecctl line echo cancellation control .......................................... 132 26h leclev minimal signal level for line echo cancellation ............... 133
psb 2170 detailed register description semiconductor group 96 01.98 27h lecatt externally provided attenuation ..........................................134 28h lecmgn margin for double talk detection........................................135 29h r ddctl dtmf detector control .......................................................136 2ah ddtw dtmf detector signal twist ...............................................137 2bh ddlev dtmf detector minimum signal level ...............................138 2chr fcfctl1 equalizer 1 control..............................................................139 2dh fcfcof1 equalizer 1 coefficient data................................................141 2eh r fcfctl2 equalizer 2 control..............................................................142 2fh fcfcof2 equalizer 2 coefficient data................................................144 30h r tgctl tone generator control ......................................................145 31h tgton tone generator time ton .................................................146 32h tgtoff tone generator time toff ...............................................147 33h tgt1 tone generator time t1.....................................................148 34h tgf1 tone generator frequency f1............................................149 35h tgg1 tone generator gain g1 ....................................................150 36h tgt2 tone generator time t2.....................................................151 37h tgf2 tone generator frequency f2............................................152 38h tgg2 tone generator gain g2 ....................................................153 39h tgt3 tone generator time t3.....................................................154 3ah tgf3 tone generator frequency f3............................................155 3bh tgg3 tone generator gain g3 ....................................................156 3ch tgf4 tone generator frequency f4............................................157 3dh tgg4 tone generator gain g4 ....................................................158 3eh tggo1 tone generator gain output 1 ...........................................159 3fh tggo2 tone generator gain output 2 ...........................................160 47h r spsctl sps control ........................................................................161 4ah dout0 data out (timeslot 0)..........................................................162 4bh dout1 data out (timeslot 1)..........................................................163 4ch dout2 data out (timeslot 2)..........................................................164 4dh dout3 data out (timeslot 3 or static mode)..................................165 4eh din data in (timeslot 3 or static mode) ....................................166 4fh ddir data direction (timeslot 3 or static mode) .........................167 60h r sctl speakerphone control ........................................................168 62h r ssrc1 speakerphone source 1 .....................................................170 63h r ssrc2 speakerphone source 2 .....................................................171 64h ssdx1 speech detector (transmit) 1 .............................................172 65h ssdx2 speech detector (transmit) 2 .............................................173 66h ssdx3 speech detector (transmit) 3 .............................................174 67h ssdx4 speech detector (transmit) 4 .............................................175 68h ssdr1 speech detector (receive) 1 ..............................................176 69h ssdr2 speech detector (receive) 2 ..............................................177 6ah ssdr3 speech detector (receive) 3 ..............................................178 6bh ssdr4 speech detector (receive) 4 ..............................................179
psb 2170 detailed register description semiconductor group 97 01.98 6ch sscas1 speech comparator (acoustic side) 1 ............................... 180 6dh sscas2 speech comparator (acoustic side) 2 ............................... 181 6eh sscas3 speech comparator (acoustic side) 3 ............................... 182 6fh sscls1 speech comparator (line side) 1...................................... 183 70h sscls2 speech comparator (line side) 2...................................... 184 71h sscls3 speech comparator (line side) 3...................................... 185 72h satt1 attenuation unit 1............................................................... 186 73h satt2 attenuation unit 2............................................................... 187 74h sagx1 automatic gain control (transmit) 1.................................. 188 75h sagx2 automatic gain control (transmit) 2.................................. 189 76h sagx3 automatic gain control (transmit) 3.................................. 190 77h sagx4 automatic gain control (transmit) 4.................................. 191 78h sagx5 automatic gain control (transmit) 5.................................. 192 79h sagr1 automatic gain control (receive) 1................................... 193 7ah sagr2 automatic gain control (receive) 2................................... 194 7bh sagr3 automatic gain control (receive) 3................................... 195 7ch sagr4 automatic gain control (receive) 4................................... 196 7dh sagr5 automatic gain control (receive) 5................................... 197 7eh slga line gain ............................................................................ 198 80h saelen acoustic echo cancellation length.................................... 199 81h saeatt acoustic echo cancellation double talk attenuation ........ 200 82h saegs acoustic echo cancellation global scale .......................... 201 83h saeps acoustic echo cancellation partial scale........................... 202 84h saebl acoustic echo cancellation first block .............................. 203 85h saewfl wiener filter limit attenuation ........................................... 204 86h saewft wiener filter transition time ............................................. 205 90h scsd1 speech detector (comfort noise) 1 ................................... 206 91h scsd2 speech detector (comfort noise) 2 ................................... 207 92h scsd3 speech detector (comfort noise) 3 ................................... 208 93h scsd4 speech detector (comfort noise) 4 ................................... 209 94h sclpt low pass time constant ................................................... 210 95h sccr correlation.......................................................................... 211 96h sccrn correlation noise threshold............................................... 212 97h sccrs correlation sensitivity......................................................... 213 98h sccrl correlation limit ................................................................. 214 99h scdt double talk detection ........................................................ 215 9ah scdtn double talk detection threshold ....................................... 216 9bh scdts double talk sensitivity ....................................................... 217 9ch scdtl double talk limit................................................................ 218 9dh scattn attenuation noise ............................................................... 219 9eh scatts attenuation sensitivity ........................................................ 220 9fh scattl attenuation limit................................................................. 221 a0h scaecl global attenuation limit (full duplex speakerphone) ....... 222
psb 2170 detailed register description semiconductor group 98 01.98 a1h scstgp single talk gap time..........................................................223 a2h scstatt single talk attenuation .......................................................224 a3h scstnl single talk noise level.......................................................225 a4h scsts single talk sensitivity .........................................................226 a5h scsttim single talk time .................................................................227 a6h scstis single talk attack speed ....................................................228 a7h scstds single talk decay speed....................................................229 a8h sclspn loudspeaker noise .............................................................230 a9h sclsps loudspeaker sensitivity ......................................................231 aah sclspl loudspeaker limit...............................................................232 abh sccn1 comfort noise constant level ............................................233 ach sccn2 comfort noise multiplication factor ....................................234 adh sccn3 comfort noise low pass.....................................................235 note: registers cctl is only affected by reset. for spsctl see the register description. 5.3.2 register naming conventions several registers contain one or more fields for input signal selection. all fields labelled i 1 (i 2 , i 3 ) are five bits wide and use the same coding as shown in table 56. table 56 signal encoding 4 3 2 1 0 signal description 00000s 0 silence 00001s 1 analog line input (channel 1 of psb 4851 interface) 00010s 2 analog line output (channel 1 of psb 4851 interface) 00011s 3 microphone input (channel 2 of psb 4851 interface) 00100s 4 loudspeaker/handset output (channel 2 of psb 4851 interface) 00101s 5 serial interface input, channel 1 00110s 6 serial interface output, channel 1 00111s 7 serial interface input, channel 2 01000s 8 serial interface output, channel 2 01001s 9 dtmf generator output 01010s 10 dtmf generator auxiliary output 01011s 11 speakerphone output (acoustic side) 01100s 12 speakerphone output (line side)
psb 2170 detailed register description semiconductor group 99 01.98 01101s 13 reserved 01110s 14 universal attenuator output 01111s 15 line echo canceller output 10000s 16 agc unit output (after agc) 10001s 17 agc unit output (before agc) 10010s 18 equalizer 1 output 10011s 19 equalizer 2 output 10100s 20 tone generator output 1 10101s 21 tone generator output 2 1011 - reserved 1 1 - - - reserved table 56 signal encoding 4 3 2 1 0 signal description
psb 2170 detailed register description semiconductor group 100 01.98 00 h rev revision the revision register can only be read. note: a write access to the revision register does not alter its content. it does, however, reset the abt bit of the status register. 1) undefined 15 0 00110000- 1) -------
psb 2170 detailed register description semiconductor group 101 01.98 01 h r cctl chip control pd power down 0: psb 2170 is in active mode 1: enter power-down mode gpp enable general purpose port 15 0 0000000pd0000 gpp 00 reset value 000000000000 0 00 3 2 description 0 0 disabled 0 1 reserved 1 0 reserved 1 1 enabled
psb 2170 detailed register description semiconductor group 102 01.98 02 h r intm interrupt mask register if a bit of this register is reset (set to 0), the corresponding bit of the status register does not generate an interrupt. if a bit is set (set to 1), an external interrupt can be generated by the corresponding bit of the status register. 15 0 rdy 1 0 0 cia cd cpt 0 0 0 0 dtv atv act 0 0 reset value 0100000000000000
psb 2170 detailed register description semiconductor group 103 01.98 03 h r afectl analog front end interface control als loudspeaker amplification this value is transferred on channel c3 of the afe interface. if the psb 4851 is used it represents the amplification of the loudspeaker amplifier. en interface enable 0: afe interface disabled 1: afe interface enabled 15 0 0000 als 0000000en reset value 0000 0 00000000
psb 2170 detailed register description semiconductor group 104 01.98 04 h r ifs1 interface select 1 the signal selection fields i1, i2 and i3 of ifs1 determine the outgoing signal of channel 1 of the analog interface. for the psb 4851 this is usually the line out signal. the hp bit enables a high-pass for the incoming signal of channel 1 of the analog interface. for the psb 4851 this is usually the line in signal. hp high-pass for s 1 0: disabled 1: enabled i1 input signal 1 for ig2 i2 input signal 2 for ig2 i3 input signal 3 for ig2 note: as all sources are always active, unused sources must be set to 0 (s 0 ). 15 0 hp i1 i2 i3 reset value 00 0 0
psb 2170 detailed register description semiconductor group 105 01.98 05 h r ifg1 interface gain 1 ifg1 is associated with the incoming signal of channel 1 of the analog interface. for the psb 4851 this is usually the line in signal. ig1 in order to obtain a gain g the parameter ig1 can be calculated by the following formula: 15 0 0ig1 reset value 0 8192 (0 db) ig1 32768 g 12.04 db C () 20 db 10 =
psb 2170 detailed register description semiconductor group 106 01.98 06 h r ifg2 interface gain 2 ifg2 is associated with the outgoing signal of channel 1 of the analog interface. for the psb 4851 this is usually the line out signal. ig2 gain of amplifier ig2 in order to obtain a gain g the parameter ig2 can be calculated by the following formula: 15 0 0ig2 reset value 0 8192 (0 db) ig2 32768 g 12.04 db C () 20 db 10 =
psb 2170 detailed register description semiconductor group 107 01.98 07 h r ifs2 interface select 2 the signal selection fields i1, i2 and i3 of ifs2 determine the outgoing signal of channel 2 of the analog interface. for the psb 4851 this is usually the loudspeaker signal. the hp bit enables a high-pass for the incoming signal of channel 2 of the analog interface. for the psb 4851 this is usually the microphone signal. hp high-pass for s 3 0: disabled 1: enabled i1 input signal 1 for ig4 i2 input signal 2 for ig4 i3 input signal 3 for ig4 note: as all sources are always active, unused sources must be set to 0 (s 0 ). 15 0 hp i1 i2 i3 reset value 00 0 0
psb 2170 detailed register description semiconductor group 108 01.98 08 h r ifg3 interface gain 3 ifg3 is associated with the incoming signal of channel 2 of the analog interface. for the psb 4851 this is usually the microphone signal. ig3 gain of amplifier ig3 in order to obtain a gain g the parameter ig3 can be calculated by the following formula: 15 0 0ig3 reset value 0 8192 (0 db) ig3 32768 g 12.04 db C () 20 db 10 =
psb 2170 detailed register description semiconductor group 109 01.98 09 h r ifg4 interface gain 4 ifg4 is associated with the outgoing signal of channel 2 of the analog interface. for the psb 4851 this is usually the loudspeaker signal. ig4 gain of amplifier ig4 in order to obtain a gain g the parameter ig4 can be calculated by the following formula: 15 0 0ig4 reset value 0 8192 (0 db) ig4 32768 g 12.04 db C () 20 db 10 =
psb 2170 detailed register description semiconductor group 110 01.98 0a h r sdconf serial data interface configuration nts number of timeslots dcl double clock mode 0: single clock mode 1: double clock mode en enable interface 0: interface is disabled (both channels) 1: interface is enabled (depending on separate channel enable bits) 15 0 00 nts 00000dcl0en reset value 00 0 00000000 11 10 9 8 7 6 description 0000001 0000012 ... ... ... ... ... ... ... 11111164
psb 2170 detailed register description semiconductor group 111 01.98 0b h r sdchn1 serial data interface channel 1 nas number of active drst strobe (ssdi interface mode) pcd pcm code 0: a-law 1: m -law en enable interface 0: interface is disabled 1: interface is enabled if sdconf:en=1 pcm pcm mode 0: 16 bit linear coding (two timeslots) 1: 8 bit pcm coding (one timeslot) dd data direction 0: dd: data downstream, du: data upstream 1: dd: data upstream, du: data downstream ts timeslot for channel 1 15 0 nas 0 0 pcd en pcm dd ts reset value 0 000000 0 15 14 13 12 description 00001 ... ... ... ... ... 111116 543210description 0000000 ... ... ... ... ... ... ... 11111163
psb 2170 detailed register description semiconductor group 112 01.98 note: if pcm=0 then ts denotes the first timeslot of the two consecutive timeslots used. only even timeslots are allowed in this case.
psb 2170 detailed register description semiconductor group 113 01.98 0c h r ifs3 interface select 3 the signal selection fields i1, i2 and i3 of ifs3 determine the outgoing signal of channel 1 of the iom/ssdi-interface. the hp bit enables a high-pass for the incoming signal of channel 1 of the analog iom/ ssdi-interface. hp high-pass for s 6 0: disabled 1: enabled i1 input signal 1 for s 5 i2 input signal 2 for s 5 i3 input signal 3 for s 5 note: as all sources are always active, unused sources must be set to 0 (s 0 ). 15 0 hp i1 i2 i3 reset value 00 0 0
psb 2170 detailed register description semiconductor group 114 01.98 0d h r sdchn2 serial data interface channel 2 pcd pcm code 0: a-law 1: m -law en enable interface 0: interface is disabled 1: interface is enabled if sdconf:en=1 pcm pcm mode 0: 16 bit linear coding (two timeslots) 1: 8 bit pcm coding (one timeslot) dd data direction 0: dd: data downstream, du: data upstream 1: dd: data upstream, dd: data downstream ts timeslot for channel 2 note: if pcm=0 then ts denotes the first timeslot of the two consecutive timeslots used. only even timeslots are allowed in this case. 15 0 000000pcdenpcmdd ts reset value 0000000000 0 5 4 3 2 1 0 description 0000000 0000011 ... ... ... ... ... ... ... 11111163
psb 2170 detailed register description semiconductor group 115 01.98 0e h r ifs4 interface select 4 the signal selection fields i1, i2 and i3 of ifs4 determine the outgoing signal of channel 2 of the iom/ssdi-interface. the hp bit enables a high-pass for the incoming signal of channel 2. hp high-pass for s 7 0: disabled 1: enabled i1 input signal 1 for s 8 i2 input signal 2 for s 8 i3 input signal 3 for s 8 as all sources are always active, unused sources must be set to 0 (s 0 ). 15 0 hp i1 i2 i3 reset value 00 0 0
psb 2170 detailed register description semiconductor group 116 01.98 0f h r ifg5 interface gain 5 att1 attenuation for i3 (channel 1) in order to obtain an attenuation a the parameter att1 can be calculated by the following formula: att2 attenuation for i3 (channel 2) in order to obtain an attenuation a the parameter att2 can be calculated by the following formula: 15 0 att1 att2 reset value 255 (0 db) 255 (0 db) att1 256 a20db 10 = att2 256 a20db 10 =
psb 2170 detailed register description semiconductor group 117 01.98 10 h r ua universal attenuator att attenuation for ua for a given attenuation a [db] the parameter att can be calculated by the following formula: i1 input selection for ua 15 0 att 000 i1 reset value 0 (-100 db) 0 0 0 0 att 256 a20db 10 =
psb 2170 detailed register description semiconductor group 118 01.98 11 h r dgctl dtmf generator control en generator enable 0: disabled 1: enabled md mode 0: raw 1: cooked dtc dial tone code (cooked mode) 15 0 enmd0000000000 dtc reset value 000000000000 0 3 2 1 0 digit frequency 0 0 0 0 1 697/1209 0 0 0 1 2 697/1336 0 0 1 0 3 697/1477 0 0 1 1 a 697/1633 0 1 0 0 4 770/1209 0 1 0 1 5 770/1336 0 1 1 0 6 770/1477 0 1 1 1 b 770/1633 1 0 0 0 7 852/1209 1 0 0 1 8 852/1336 1 0 1 0 9 852/1477 1 0 1 1 c 852/1633 1 1 0 0 * 941/1209 1 1 0 1 0 941/1336 1 1 1 0 # 941/1477 1 1 1 1 d 941/1633
psb 2170 detailed register description semiconductor group 119 01.98 12 h dgf1 dtmf generator frequency 1 frq frequency of generator 1 the parameter frq for a given frequency f [hz] can be calculated by the following formula: 15 0 0 frq frq 32768 f 4000hz ------------------- =
psb 2170 detailed register description semiconductor group 120 01.98 13 h dgf2 dtmf generator frequency 2 frq frequency of generator 2 he parameter frq for a given frequency f [hz] can be calculated by the following formula: 15 0 0frq frq 32768 f 4000hz ------------------- =
psb 2170 detailed register description semiconductor group 121 01.98 14 h dgl dtmf generator level lev2 signal level of generator 2 in order to obtain a signal level l (relative to the pcm maximum value) for generator 2 the value of lev2 can be calculated according to the following formula: lev1 signal level of generator 1 in order to obtain a signal level l (relative to the pcm maximum value) for generator 1 the value of lev1 can be calculated according to the following formula: 15 0 0 lev2 0 lev1 lev2 128 l20db 10 = lev1 128 l20db 10 =
psb 2170 detailed register description semiconductor group 122 01.98 15 h dgatt dtmf generator attenuation att2 attenuation of signal s 10 in order to obtain attenuation a the parameter att2 can be calculated by the formula: att1 attenuation of signal s 9 in order to obtain attenuation a the parameter att1 can be calculated by the formula: 15 0 0att20att1 att2 128 1024 a20db 10 +a181db , > ; 128 a20db 10 a 18 1 db , < ; ? = att1 128 1024 a20db 10 +a181db , > ; 128 a20db 10 a 18 1 db , < ; ? =
psb 2170 detailed register description semiconductor group 123 01.98 1a h r atdctl0 alert tone detection 0 en enable alert tone detection 0: the alert tone detection is disabled 1: the alert tone detection is enabled i1 input signal selection atc alert tone code 1) undefined 15 0 en00 i1 000000 atc reset value 000 0 000000 - 1) 1 0 description 0 0 no tone 0 1 2130 1 0 2750 1 1 2130/2750
psb 2170 detailed register description semiconductor group 124 01.98 1b h atdctl1 alert tone detection 1 md alert tone detection mode 0: only a dual tone is detected 1: either a dual or a single tone is detected dev maximum frequency deviation for alert tone 0: 0.5% 1: 1.1% gt gap time 0: long 1: short min minimum level of alert tone signal for a minimum signal level min the parameter min is given by the following formula: 15 0 md00dev000gt min min 2560 min 20 db 10 =
psb 2170 detailed register description semiconductor group 125 01.98 1c h r cidctl0 caller id control 0 en cid enable 0: disabled 1: enabled i1 input signal selection data last received data byte 15 0 en 0 0 i1 data reset value 000 0 0
psb 2170 detailed register description semiconductor group 126 01.98 1d h cidctl1 caller id control 1 nmb minimum number of mark bits nmss minimum number of mark/space sequences min minimum signal level for cid decoder for a minimum signal level min the parameter min is given by the following formula: 15 0 nmb nmss min 15 14 13 12 11 10 description 0000000 000 110 ... ... ... ... ... ... ... 111111630 9 8 7 6 5 description 000001 0000111 ... ... ... ... ... 11111311 min 640 min 20 db 10 =
psb 2170 detailed register description semiconductor group 127 01.98 20 h r cptctl call progress tone control en cpt detector enable 0: disabled 1: enabled md cpt mode 0: raw 1: cooked i1 input signal selection 15 0 enmd000000000 i1 reset value 00000000000 0
psb 2170 detailed register description semiconductor group 128 01.98 21 h cpttr call progress tone thresholds num number of cycles sn minimal signal-to-noise ratio min minimum signal level for cpt detector 15 0 num 0 sn min 15 14 13 cooked mode raw mode 0 0 0 reserved 0 0 0 1 2 reserved ... ... ... ... reserved 1 1 1 8 reserved 11 10 9 8 description 11119db 100012db 010015db 001018db 000022db value description 89 h -40 db 85 h -42 db 80 h -44 db 9a h -46 db 95 h -48 db 90 h -50 db
psb 2170 detailed register description semiconductor group 129 01.98 22 h cptmn cpt minimum times minb minimum time for cpt burst the parameter minb for a minimal burst time tbmin can be calculated by the following formula: ming minimum time for cpt gap the parameter ming for a minimal burst time tgmin can be calculated by the following formula: 15 0 minb ming minb tbmin 32 ms C 4 ------------------------------------- - = ming tgmin 32 ms C 4 -------------------------------------- =
psb 2170 detailed register description semiconductor group 130 01.98 23 h cptmx cpt maximum times maxb maximum time for cpt burst the parameter maxb for a maximal burst time of tbmax can be calculated by the following formula: maxg maximum time for cpt gap the parameter maxg for a maximal burst time of tgmax can be calculated by the following formula: 15 0 maxb maxg minb tbmax tbmin C 8 ----------------------------------------- = ming tgmax tgmin C 8 ----------------------------------------- - =
psb 2170 detailed register description semiconductor group 131 01.98 24 h cptdt cpt delta times difb maximum time difference between consecutive bursts the parameter difb for a maximal difference of t ms of two burst durations can be calculated by the following formula: difg maximum time difference between consecutive gaps the parameter difg for a maximal difference of t ms of two gap durations can be calculated by the following formula: 15 0 difb difg difb t 2ms ----------- = difg t 2ms ----------- =
psb 2170 detailed register description semiconductor group 132 01.98 25 h r lecctl line echo cancellation control en enable 0: disabled 1: enabled i1 input signal selection for i 1 i2 input signal selection for i 2 15 0 en00000 i1 i2 reset value 000000 0 0
psb 2170 detailed register description semiconductor group 133 01.98 26 h leclev minimal signal level for line echo cancellation min the parameter min for a minimal signal level l (db) can be calculated by the following formula: 15 0 0min min 512 96.3 l + () 5log2 ---------------------------------------- =
psb 2170 detailed register description semiconductor group 134 01.98 27 h lecatt externally provided attenuation att the parameter att for an externally provided attenuation a (db) can be calculated by the following formula: 15 0 0att att 512 a 5log2 ------------------- =
psb 2170 detailed register description semiconductor group 135 01.98 28 h lecmgn margin for double talk detection mgn the parameter mgn for a margin of l (db) can be calculated by the following formula: 15 0 0mgn mgn 512 l 5log2 ------------------- =
psb 2170 detailed register description semiconductor group 136 01.98 29 h r ddctl dtmf detector control en enable dtmf tone detection 0: the dtmf detection is disabled 1: the dtmf detection is enabled i1 input signal selection dtc dtmf tone code 1) the dtc code remains valid until a new dtmf tone has been detected. 2) undefined 15 0 en00 i1 000 dtc 1) reset value 0000000- 2) 4 3 2 1 0 frequency digit 1 0 0 0 0 941 / 1633 d 1 0 0 0 1 697 / 1209 1 1 0 0 1 0 697 / 1336 2 1 0 0 1 1 697 / 1477 3 1 0 1 0 0 770 / 1209 4 1 0 1 0 1 770 / 1336 5 1 0 1 1 0 770 / 1477 6 1 0 1 1 1 852 / 1209 7 1 1 0 0 0 852 / 1336 8 1 1 0 0 1 852 / 1477 9 1 1 0 1 0 941 / 1336 0 1 1 0 1 1 941 / 1209 * 1 1 1 0 0 941 / 1477 # 1 1 1 0 1 697 / 1633 a 1 1 1 1 0 770 / 1633 b 1 1 1 1 1 852 / 1633 c
psb 2170 detailed register description semiconductor group 137 01.98 2a h ddtw dtmf detector signal twist twist signal twist for dtmf tone in order to obtain a minimal signal twist t the parameter twist can be calculated by the following formula: note: twist must be in the range [4096,20480] 15 0 0twist twist 32768 0.5 db t C () 10 db 10 =
psb 2170 detailed register description semiconductor group 138 01.98 2b h ddlev dtmf detector minimum signal level min minimum signal level note: values outside the given range are reserved an must not be used. 15 0 1111111111 min 5 4 3 2 1 0 description 001110 -50db 001111 -49db ... ... ... ... ... ... ... 100001 -31db 100010 -30db
psb 2170 detailed register description semiconductor group 139 01.98 2c h r fcfctl1 equalizer 1 control en enable equalizer 1 0: the equalizer is disabled 1: the equalizer is enabled adr coefficient address 15 0 en0 adr 000 i reset value 00 0 000 0 13 12 11 10 9 8 coefficient 000000 a1 000001 a2 000010 a3 000011 a4 000100 a5 000101 a6 000110 a7 000111 a8 001000 a9 001001 b2 001010 b3 001011 b4 001100 b5 001101 b6 001 110 b7 001111 b8 010000 b9 010001 c1 010010 d1 010011 d2 010100 d3 010101 d4 01 0110 d5
psb 2170 detailed register description semiconductor group 140 01.98 i1 input signal selection 010111 d6 011000 d7 011001 d8 011010 d9 011011 d10 011100 d11 011101 d12 01 1 110 d13 011111 d14 100000 d15 100001 d16 100010 d17 100011 c2 13 12 11 10 9 8 coefficient
psb 2170 detailed register description semiconductor group 141 01.98 2d h fcfcof1 equalizer 1 coefficient data v coefficient value for the coefficient a 1 -a 9 , b 2 -b 9 and d 1 -d 17 the following formula can be used to calculate v for a coefficient c : for the coefficients c 1 and c 2 the following formula can be used to calculate v for a coefficient c : 15 0 v v 32768 c =; -1c1 < v128c = ; 1 c 256 <
psb 2170 detailed register description semiconductor group 142 01.98 2e h r fcfctl2 equalizer 2 control en enable equalizer 1 0: the equalizer is disabled 1: the equalizer is enabled adr coefficient address 15 0 en 0 adr 0 0 0 i reset value 0000000 13 12 11 10 9 8 coefficient 000000 a1 000001 a2 000010 a3 000011 a4 000100 a5 000101 a6 000110 a7 000111 a8 001000 a9 001001 b2 001010 b3 001011 b4 001100 b5 001101 b6 001 110 b7 001111 b8 010000 b9 010001 c1 010010 d1 010011 d2 010100 d3 010101 d4 01 0110 d5
psb 2170 detailed register description semiconductor group 143 01.98 i1 input signal selection 010111 d6 011000 d7 011001 d8 011010 d9 011011 d10 011100 d11 011101 d12 01 1 110 d13 011111 d14 100000 d15 100001 d16 100010 d17 100011 c2 13 12 11 10 9 8 coefficient
psb 2170 detailed register description semiconductor group 144 01.98 2f h fcfcof2 equalizer 2 coefficient data v coefficient value for the coefficient a 1 -a 9 , b 2 -b 9 and d 1 -d 17 the following formula can be used to calculate v for a coefficient c : for the coefficients c 1 and c 2 the following formula can be used to calculate v for a coefficient c : 15 0 v v 32768 c =; -1c1 < v128c =; 1c256 <
psb 2170 detailed register description semiconductor group 145 01.98 30 h r tgctl tone generator control cgm control generator mode dt dual tone 0: f4 not added (option 1) 1: f4 added (option 2) bgm beat generator mode sm stop mode 0: immediate 1: controlled wf waveform 0: sine wave 1: square wave 15 0 000000000 cgm dt bgm smwf reset value 000000000 0 0 0 00 6 5 description 0 0 tone generator off 0 1 tone generator on 1 - tone generator enabled/disabled by control generator 3 2 description 0 0 continuous tone f1 0 1 continuous tone f2 1 0 two tone cadence 1 1 three tone sequence
psb 2170 detailed register description semiconductor group 146 01.98 31 h tgton tone generator time ton tm mantissa of ton the mantissa tm for a time t ([ms]) can be calculated by the following formula: te exponent of ton the exponent te for a time t ([ms]) can be calculated by the following formula: note: te > 0 15 0 tm te tm t 2 te -------- - = te log 2 t =
psb 2170 detailed register description semiconductor group 147 01.98 32 h tgtoff tone generator time toff tm mantissa of toff the mantissa tm for a time t ([ms]) can be calculated by the following formula: te exponent of toff the exponent te for a time t ([ms]) can be calculated by the following formula: note: te > 0 15 0 tm te tm t 2 te -------- - = te log 2 t =
psb 2170 detailed register description semiconductor group 148 01.98 33 h tgt1 tone generator time t1 time the parameter time for a time t ([ms]) can be calculated by the following formula: 15 0 time time t 8 -- - =
psb 2170 detailed register description semiconductor group 149 01.98 34 h tgf1 tone generator frequency f1 f frequency the parameter f for a frequency f ([hz]) can be calculated by the following formula: 15 0 0f f8192 , f =
psb 2170 detailed register description semiconductor group 150 01.98 35 h tgg1 tone generator gain g1 ggain the parameter g for a gain g ([db]) can be calculated by the following formula: 15 0 0g f 32768 g20 10 =
psb 2170 detailed register description semiconductor group 151 01.98 36 h tgt2 tone generator time t2 time the parameter time for a time t ([ms]) can be calculated by the following formula: 15 0 time time t 8 -- - =
psb 2170 detailed register description semiconductor group 152 01.98 37 h tgf2 tone generator frequency f2 f frequency the parameter f for a frequency f ([hz]) can be calculated by the following formula: 15 0 0f f8192 , f =
psb 2170 detailed register description semiconductor group 153 01.98 38 h tgg2 tone generator gain g2 ggain the parameter g for a gain g ([db]) can be calculated by the following formula: 15 0 0g f 32768 g20 10 =
psb 2170 detailed register description semiconductor group 154 01.98 39 h tgt3 tone generator time t3 time the parameter time for a time t ([ms]) can be calculated by the following formula: 15 0 time time t 8 -- - =
psb 2170 detailed register description semiconductor group 155 01.98 3a h tgf3 tone generator frequency f3 f frequency the parameter f for a frequency f ([hz]) can be calculated by the following formula: 15 0 0f f8192 , f =
psb 2170 detailed register description semiconductor group 156 01.98 3b h tgg3 tone generator gain g3 ggain the parameter g for a gain g ([db]) can be calculated by the following formula: 15 0 0g f 32768 g20 10 =
psb 2170 detailed register description semiconductor group 157 01.98 3c h tgf4 tone generator frequency f4 f frequency the parameter f for a frequency f ([hz]) can be calculated by the following formula: 15 0 0f f8192 , f =
psb 2170 detailed register description semiconductor group 158 01.98 3d h tgg4 tone generator gain g4 ggain the parameter g for a gain g ([db]) can be calculated by the following formula: 15 0 0g f 32768 g20 10 =
psb 2170 detailed register description semiconductor group 159 01.98 3e h tggo1 tone generator gain output 1 ggain the parameter g for a gain g ([db]) can be calculated by the following formula: 15 0 0g f 32768 g20 10 =
psb 2170 detailed register description semiconductor group 160 01.98 3f h tggo2 tone generator gain output 2 ggain the parameter g for a gain g ([db]) can be calculated by the following formula: 15 0 0g f 32768 g20 10 =
psb 2170 detailed register description semiconductor group 161 01.98 47h r spsctl sps control pos position of status register window mode mode of sps interface sp1 direct control for sps 1 0: sps 1 set to 0 1: sps 1 set to 1 sp0 direct control for sps 0 0: sps 0 set to 0 1: sps 0 set to 1 note: if mode 1 has been selected prior to power-down, both mode 1 and the values of sp1 and sp0 are retained during power-down and wake-up. other modes are reset to 0 during power down. 1) undefined 15 0 pos 0000000 mode sp1sp0 reset value 0 0000000 0 - 1) - 1) 15 14 13 12 sps 0 sps 1 0 0 0 0 bit 0 bit 1 0 0 0 1 bit 1 bit 2 ... ... ... ... ... ... 1 1 1 0 bit 14 bit 15 4 3 2 description 0 0 0 disabled (sps 0 and sps 1 zero) 0 0 1 output of sp1 and sp0 1 0 0 output of speakerphone state 1 1 0 output of status register
psb 2170 detailed register description semiconductor group 162 01.98 4a h dout0 data out (timeslot 0) data output data output data for pins ma 0 -ma 11 while ma 12 =1 (only if hwconfig1:app=10). 15 0 0000 data reset value 0000 0
psb 2170 detailed register description semiconductor group 163 01.98 4b h dout1 data out (timeslot 1) data output data output data for pins ma 0 -ma 11 while ma 13 =1 (only if hwconfig1:app=10). 15 0 0000 data reset value 0000 0
psb 2170 detailed register description semiconductor group 164 01.98 4c h dout2 data out (timeslot 2) data output data output data for pins ma 0 -ma 11 while ma 14 =1 (only if hwconfig1:app=10). 15 0 0000 data reset value 0000 0
psb 2170 detailed register description semiconductor group 165 01.98 4d h dout3 data out (timeslot 3 or static mode) data output data output data for pins ma 0 -ma 11 while ma 15 =1 (only if hwconfig1:app=10). output data for pins ma 0 -ma 15 (only if hwconfig1:app=01) 15 0 data reset value 0
psb 2170 detailed register description semiconductor group 166 01.98 4e h din data in (timeslot 3 or static mode) data input data input data for pins ma 0 -ma 11 at falling edge of ma 12 (only if hwconfig1:app=10). input data for pins ma 0 -ma 15 (only if hwconfig1:app=01) 15 0 data
psb 2170 detailed register description semiconductor group 167 01.98 4f h ddir data direction (timeslot 3 or static mode) dir port direction port direction during ma 12 =1 or in static mode. 0: input 1: output 15 0 dir reset value 0 (all inputs)
psb 2170 detailed register description semiconductor group 168 01.98 60 h r sctl speakerphone control ens enable echo suppression 0: the echo suppression unit is disabled 1: the echo suppression unit is enabled enc enable echo cancellation 0: the echo cancellation unit is disabled 1: the echo cancellation unit is enabled em echo cancellation mode ewf enable wiener filter 0: the wiener filter is disabled 1: the wiener filter is enabled nad noise adaptation 0: noise adaptation is disabled. 1: noise adaptation is enabled. red tap reduction 0: the length of the subband filter is not reduced 1: the length of the subband filter is reduced 15 0 ens enc em ewf nad red cn md sdr sdx 0 0 agr agx 0 reset value 0000000000000000 13 12 description 0 0 fullband mode 0 1 subband mode (submode 1) 1 0 subband mode (submode 2) 1 1 subband mode (submode 3)
psb 2170 detailed register description semiconductor group 169 01.98 cn comfort noise 0: the comfort noise generator is disabled. 1: the comfort noise generator is enabled. md mode 0: speakerphone mode 1: loudhearing mode sdr signal source of sdr 0: after agcr 1: before agcr sdx signal source of sdx 0: after agcx 1: before agcx agr agcr enable 0: agcr disabled 1: agcr enabled agx agcx enable 0: agcx disabled 1: agcx enabled
psb 2170 detailed register description semiconductor group 170 01.98 62 h r ssrc1 speakerphone source 1 i1 input signal selection (acoustic source 1) i2 input signal selection (acoustic source 2) 15 0 000000 i1 i2 reset value 000000 0 0
psb 2170 detailed register description semiconductor group 171 01.98 63 h r ssrc2 speakerphone source 2 i3 input signal selection (line source 1) i4 input signal selection (line source 2) 15 0 000000 i3 i4 reset value 000000 0 0
psb 2170 detailed register description semiconductor group 172 01.98 64 h ssdx1 speech detector (transmit) 1 lp2l the parameter lp2l for a saturation level l (db) can be calculated by the following formula: lim the parameter lim for a minimum signal level l (db, relative to pcm max. value) can be calculated by the following formula: 15 0 0 lp2l 0 lim lp2l 2l 5log2 ------------------- = lim 296.3l + () 5log2 ---------------------------------- =
psb 2170 detailed register description semiconductor group 173 01.98 65 h ssdx2 speech detector (transmit) 2 lp1 the parameter lp1 for a time t (ms) can be calculated by the following formula: off the parameter off for a level offset of o (db) can be calculated by the following formula: 15 0 lp1 0 off lp1 64 t 0.5 t 64 << ; 128 2048 t + 16.2 t 2048 << ; ? = off 2o 5 log2 ------------------- =
psb 2170 detailed register description semiconductor group 174 01.98 66 h ssdx3 speech detector (transmit) 3 pdn the parameter pdn for a time t (ms) can be calculated by the following formula: lp2n the parameter lp2n for a time t (ms) can be calculated by the following formula: 15 0 pdn lp2n pdn 64 t 0.5 t 64 << ; 128 2048 t + 16.2 t 2048 << ; ? = lp2n 64 t 0.5 t 64 << ; 128 2048 t + 16.2 t 2048 << ; ? =
psb 2170 detailed register description semiconductor group 175 01.98 67 h ssdx4 speech detector (transmit) 4 pds the parameter pds for a time t (ms) can be calculated by the following formula: lp2s the parameter lp2s for a time t (ms) can be calculated by the following formula: 15 0 pds 0 lp2s pds 64 t 0.5 t 64 << ; 128 2048 t + 16.2 t 2048 << ; ? = lp2s 262144 t ----------------- - =
psb 2170 detailed register description semiconductor group 176 01.98 68 h ssdr1 speech detector (receive) 1 lp2l the parameter lp2l for a saturation level l (db) can be calculated by the following formula: lim the parameter lim for a minimum signal level l (db, relative to pcm max. value) can be calculated by the following formula: 15 0 0 lp2l 0 lim lp2l 2l 5log2 ------------------- = lim 296.3l + () 5log2 ---------------------------------- =
psb 2170 detailed register description semiconductor group 177 01.98 69 h ssdr2 speech detector (receive) 2 lp1 the parameter lp1 for a time t (ms) can be calculated by the following formula: off the parameter off for a level offset of o (db) can be calculated by the following formula: 15 0 lp1 0 off lp1 64 t 0.5 t 64 << ; 128 2048 t + 16.2 t 2048 << ; ? = off 2o 5 log2 ------------------- =
psb 2170 detailed register description semiconductor group 178 01.98 6a h ssdr3 speech detector (receive) 3 pdn the parameter pdn for a time t (ms) can be calculated by the following formula: lp2n the parameter lp2n for a time t (ms) can be calculated by the following formula: 15 0 pdn lp2n pdn 64 t 0.5 t 64 << ; 128 2048 t + 16.2 t 2048 << ; ? = lp2n 64 t 0.5 t 64 << ; 128 2048 t + 16.2 t 2048 << ; ? =
psb 2170 detailed register description semiconductor group 179 01.98 6b h ssdr4 speech detector (receive) 4 pds the parameter pds for a time t (ms) can be calculated by the following formula: lp2s the parameter lp2s for a time t (ms) can be calculated by the following formula: 15 0 pds 0 lp2s pds 64 t 0.5 t 64 << ; 128 2048 t + 16.2 t 2048 << ; ? = lp2s 262144 t ----------------- - =
psb 2170 detailed register description semiconductor group 180 01.98 6c h sscas1 speech comparator (acoustic side) 1 g the parameter g for a gain a (db) can be calculated by the following formula: note: the parameter g is interpreted in twos complement. et the parameter et for a time t (ms) can be calculated by the following formula: 15 0 get g 2a 5log2 ------------------- = et t 4 -- - =
psb 2170 detailed register description semiconductor group 181 01.98 6d h sscas2 speech comparator (acoustic side) 2 gdn the parameter gdn for a gain g (db) can be calculated by the following formula: pdn the parameter pdn for a decay rate r (ms/db) can be calculated by the following formula: 15 0 0gdn pdn gdn 4g 5log2 ------------------- = pdn 64 r 5log2 ------------------- =
psb 2170 detailed register description semiconductor group 182 01.98 6e h sscas3 speech comparator (acoustic side) 3 gds the parameter gds for a gain g (db) can be calculated by the following formula: pds the parameter pds for a decay rate r (ms/db) can be calculated by the following formula: 15 0 0 gds pds gds 4g 5log2 ------------------- = pds 64 r 5log2 ------------------- =
psb 2170 detailed register description semiconductor group 183 01.98 6f h sscls1 speech comparator (line side) 1 g the parameter g for a gain a (db) can be calculated by the following formula: note: the parameter g is interpreted in twos complement. et the parameter et for a time t (ms) can be calculated by the following formula: 15 0 get g 2a 5log2 ------------------- = et t 4 -- - =
psb 2170 detailed register description semiconductor group 184 01.98 70 h sscls2 speech comparator (line side) 2 gdn the parameter gdn for a gain g (db) can be calculated by the following formula: pdn the parameter pdn for a decay rate r (ms/db) can be calculated by the following formula: 15 0 0 gdn pdn gdn 4g 5log2 ------------------- = pdn 64 r 5log2 ------------------- =
psb 2170 detailed register description semiconductor group 185 01.98 71 h sscls3 speech comparator (line side) 3 gds the parameter gds for a gain g (db) can be calculated by the following formula: pds the parameter pds for a decay rate r (ms/db) can be calculated by the following formula: 15 0 0gds pds gds 4g 5log2 ------------------- = pds 64 r 5 log2 ------------------- =
psb 2170 detailed register description semiconductor group 186 01.98 72 h satt1 attenuation unit 1 att the parameter att for an attenuation a (db) can be calculated by the following formula: sw the parameter sw for a switching rate r (ms/db) can be calculated by the following formula: 15 0 0att sw att 2a 5log2 ------------------- = sw 128 1 5log2 sw ----------------------------------- + 0.0053 sw 0.66 << ; 16 5log2 sw ----------------------------------- 0.66 sw 0.63 << ; ? ? ? =
psb 2170 detailed register description semiconductor group 187 01.98 73 h satt2 attenuation unit 2 tw the parameter tw for a time t (ms) can be calculated by the following formula: ds the parameter ds for a decay rate r (ms/db) can be calculated by the following formula: 15 0 tw ds tw t 16 ----- - = ds 5log2 r1 C 4 -------------------------------------- - =
psb 2170 detailed register description semiconductor group 188 01.98 74 h sagx1 automatic gain control (transmit) 1 ag_init the parameter ag_init for a gain g (db) can be calculated by the following formula: this parameter is interpreted in twos complement. com the threshold com for a level l (db) can be calculated by the following formula: 15 0 ag_init 0 com ag_init 2 Cg 5 log2 ------------------- = com 296.3l + () 5log2 ---------------------------------- =
psb 2170 detailed register description semiconductor group 189 01.98 75 h sagx2 automatic gain control (transmit) 2 ag_att the parameter ag_att for a gain g (db) can be calculated by the following formula: speedh the parameter speedh for the regulation speed r (ms/db) can be calculated by the following formula: the variable d denotes the aberration (db). 15 0 0 ag_att speedh ag_att 2 Cg 5log2 ------------------- = speedh 512 dr -------------- =
psb 2170 detailed register description semiconductor group 190 01.98 76 h sagx3 automatic gain control (transmit) 3 ag_gain the parameter ag_gain for a gain g (db) can be calculated by the following formula: speedl the parameter com for a gain g (db) can be calculated by the following formula: the variable d denotes the aberration (db). 15 0 ag_gain speedl ag_gain 2 Cg 5log2 ------------------- = com 296.3g + () 5log2 ---------------------------------- - =
psb 2170 detailed register description semiconductor group 191 01.98 77 h sagx4 automatic gain control (transmit) 4 nois the parameter nois for a threshold level l (db) can be calculated by the following formula: lpa the parameter lpa for a low pass time constant t (ms) can be calculated by the following formula: 15 0 0 nois 0 lpa com 296.3l + () 5log2 ---------------------------------- = lpa 16 t ----- - =
psb 2170 detailed register description semiconductor group 192 01.98 78 h sagx5 automatic gain control (transmit) 5 ag_cur the current gain g of the agc can be derived from the parameter parameter ag_cur by the following formula: ag_cur is interpreted in twos complement. 15 0 ag_cur 00000000 g 5 C log2 ag_cur 2 ----------------------------------------------------- =
psb 2170 detailed register description semiconductor group 193 01.98 79 h sagr1 automatic gain control (receive) 1 ag_init the parameter ag_init for a gain g (db) can be calculated by the following formula: this parameter is interpreted in twos complement. com the parameter com for a threshold l (db) can be calculated by the following formula: 15 0 ag_init 0 com ag_init 2 Cg 5log2 ------------------- = com 296.3l + () 5log2 ---------------------------------- =
psb 2170 detailed register description semiconductor group 194 01.98 7a h sagr2 automatic gain control (receive) 2 ag_att the parameter ag_att for a gain g (db) can be calculated by the following formula: speedh the parameter speedh for the regulation speed r (ms/db) can be calculated by the following formula: the variable d denotes the aberration (db). 15 0 0 ag_att speedh ag_att 2 Cg 5log2 ------------------- = speedh 512 dr -------------- =
psb 2170 detailed register description semiconductor group 195 01.98 7b h sagr3 automatic gain control (receive) 3 ag_gain the parameter ag_gain for a gain g (db) can be calculated by the following formula: speedl the parameter speedl for the regulation speed r (ms/db) can be calculated by the following formula: the variable d denotes the aberration (db). 15 0 ag_gain speedl ag_gain 2 Cg 5log2 ------------------- = speedl 4096 dr -------------- =
psb 2170 detailed register description semiconductor group 196 01.98 7c h sagr4 automatic gain control (receive) 4 nois the parameter nois for a threshold level l (db) can be calculated by the following formula: lpa the parameter lpa for a low pass time constant t (ms) can be calculated by the following formula: 15 0 0 nois 0 lpa com 296.3l + () 5log2 ---------------------------------- = lpa 16 t ----- - =
psb 2170 detailed register description semiconductor group 197 01.98 7d h sagr5 automatic gain control (receive) 5 ag_cur the current gain g of the agc can be derived from the parameter parameter ag_cur by the following formula: ag_cur is interpreted in twos complement. 15 0 ag_cur 00000000 g 5 C log2 ag_cur 2 ----------------------------------------------------- =
psb 2170 detailed register description semiconductor group 198 01.98 7e h slga line gain lgar the parameter lgar for a gain g (db) is given by the following formula: lgax the parameter lgax for a gain g (db) is given by the following formula: 15 0 0 lgar 0 lgax lgar 128 g12 C () 20 10 = lgax 128 g12 C () 20 10 =
psb 2170 detailed register description semiconductor group 199 01.98 80 h saelen acoustic echo cancellation length len len denotes the number of fir-taps used. 15 0 000000 len
psb 2170 detailed register description semiconductor group 200 01.98 81 h saeatt acoustic echo cancellation double talk attenuation att the parameter att for an attenuation a (db) is given by the following formula: 15 0 0att att 512 a 5log2 ------------------- =
psb 2170 detailed register description semiconductor group 201 01.98 82 h saegs acoustic echo cancellation global scale gs all coefficients of the fir filter are scaled by a factor c. this factor is given by the following equation: 15 0 0000000000000 gs c2 gs =
psb 2170 detailed register description semiconductor group 202 01.98 83 h saeps acoustic echo cancellation partial scale ps the additional scaling coefficient ac is given by the following formula: 15 0 0000000000000 ps ac 2 ps =
psb 2170 detailed register description semiconductor group 203 01.98 84 h saebl acoustic echo cancellation first block fb the parameter fb denotes the first block that is affected by the partial scaling coefficient. if the partial coefficient is one, fb is disregarded. 15 0 0000000000000 fb
psb 2170 detailed register description semiconductor group 204 01.98 85 h saewfl wiener filter limit attenuation limit the parameter limit for a maximal attenuation a (db) is given by the following formula: 15 0 0 limit limit 512 a 5log2 ------------------- =
psb 2170 detailed register description semiconductor group 205 01.98 86 h saewft wiener filter transition time trtime t.b.d. (default: 16384) 15 0 0 trtime
psb 2170 detailed register description semiconductor group 206 01.98 90 h scsd1 speech detector (comfort noise) 1 lp2l the parameter lp2l for a saturation level l (db) can be calculated by the following formula: lim the parameter lim for a minimum signal level l (db, relative to pcm max. value) can be calculated by the following formula: 15 0 0 lp2l 0 lim lp2l 2l 5log2 ------------------- = lim 296.3l + () 5log2 ---------------------------------- =
psb 2170 detailed register description semiconductor group 207 01.98 91 h scsd2 speech detector (comfort noise) 2 lp1 the parameter lp1 for a time t (ms) can be calculated by the following formula: off the parameter off for a level offset of o (db) can be calculated by the following formula: 15 0 lp1 0 off lp1 64 t 0.5 t 64 << ; 128 2048 t + 16.2 t 2048 << ; ? = off 2o 5 log2 ------------------- =
psb 2170 detailed register description semiconductor group 208 01.98 92 h scsd3 speech detector (comfort noise) 3 pdn the parameter pdn for a time t (ms) can be calculated by the following formula: lp2n the parameter lp2n for a time t (ms) can be calculated by the following formula: 15 0 pdn lp2n pdn 64 t 0.5 t 64 << ; 128 2048 t + 16.2 t 2048 << ; ? = lp2n 64 t 0.5 t 64 << ; 128 2048 t + 16.2 t 2048 << ; ? =
psb 2170 detailed register description semiconductor group 209 01.98 93 h scsd4 speech detector (comfort noise) 4 pds the parameter pds for a time t (ms) can be calculated by the following formula: lp2s the parameter lp2s for a time t (ms) can be calculated by the following formula: 15 0 pds 0 lp2s pds 64 t 0.5 t 64 << ; 128 2048 t + 16.2 t 2048 << ; ? = lp2s 262144 t ----------------- - =
psb 2170 detailed register description semiconductor group 210 01.98 94 h sclpt low pass time constant bn the parameter tc for a time constant t (ms) can be calculated by the following formula: note: bn must be greater than zero. 15 0 0tc tc 65534 t -------------- - =
psb 2170 detailed register description semiconductor group 211 01.98 95 h sccr correlation corr the parameter corr for a linear correlation c is given by: note: corr must be greater than 0x4fff. the default value for a noise free environment is c=0.93, i.e. corr=0x7700. 15 0 0 1 corr corr 32768 c =
psb 2170 detailed register description semiconductor group 212 01.98 96 h sccrn correlation noise threshold nth the parameter nth for a threshold l (db, relative to pcm max. value) can be calculated by the following formula: 15 0 0 nth nth 512 96.3 l + () 5log2 ---------------------------------------- =
psb 2170 detailed register description semiconductor group 213 01.98 97 h sccrs correlation sensitivity cs the parameter cs for a sensitivity se (1/db) can be calculated by the following formula: 15 0 1111 cs cs 655350 2 () log se =
psb 2170 detailed register description semiconductor group 214 01.98 98 h sccrl correlation limit limit the parameter limit for a correlation limit l is given by: note: l must be greater than 0x4fff. 15 0 0 1 limit limit 32768 l =
psb 2170 detailed register description semiconductor group 215 01.98 99 h scdt double talk detection dtd the parameter dtd for a level l (db, relative to pcm max. value) can be calculated by the following formula: note: dtd must be greater than 0x7ff. 15 0 0 dtd dtd 512 l 5log2 ------------------- =
psb 2170 detailed register description semiconductor group 216 01.98 9a h scdtn double talk detection threshold nth the parameter nth for a noise threshold l (db, relative to pcm max. value) can be calculated by the following formula: 15 0 0 nth nth 512 96.3 l + () 5log2 ---------------------------------------- =
psb 2170 detailed register description semiconductor group 217 01.98 9b h scdts double talk sensitivity dts the parameter dts for a sensitivity se (1/db) can be calculated by the following formula: 15 0 1111 dts s2048se =
psb 2170 detailed register description semiconductor group 218 01.98 9c h scdtl double talk limit limit the parameter limit for a level l (db, relative to pcm max. value) can be calculated by the following formula: note: limit must be greater than 0x7ff. 15 0 0 limit limit 512 l 5log2 ------------------- =
psb 2170 detailed register description semiconductor group 219 01.98 9d h scattn attenuation noise nth the parameter nth for a threshold l (db, relative to pcm max. value) can be calculated by the following formula: 15 0 0 nth nth 512 96.3 l + () 5log2 ---------------------------------------- =
psb 2170 detailed register description semiconductor group 220 01.98 9e h scatts attenuation sensitivity as the parameter as for a sensitivity se (1/db) can be calculated by the following formula: 15 0 0as as 2028 se =
psb 2170 detailed register description semiconductor group 221 01.98 9f h scattl attenuation limit limit the parameter limit for a level l (db, relative to pcm max. value) can be calculated by the following formula: note: limit must be greater than 0x7ff. 15 0 0 limit limit 512 l 5log2 ------------------- =
psb 2170 detailed register description semiconductor group 222 01.98 a0 h scaecl global attenuation limit (full duplex speakerphone) glimit the parameter glimit for a maximum attenuation a (db) can be calculated by the following formula: note: glimit must be greater than 0x7ff. 15 0 0glimit glimit 512 a 5log2 ------------------- =
psb 2170 detailed register description semiconductor group 223 01.98 a1 h scstgp single talk gap time gt the minimal gap time gt for a time t (ms) can be calculated by the following formula: note: gt must be greater than 0. 15 0 gt gt 8 t =
psb 2170 detailed register description semiconductor group 224 01.98 a2 h scstatt single talk attenuation att the parameter att for an attenuation a (db) can be calculated by the following formula: 15 0 0att att 512 a 5log2 ------------------- =
psb 2170 detailed register description semiconductor group 225 01.98 a3 h scstnl single talk noise level nth the parameter nth for a noise threshold l (db) can be calculated by the following formula: 15 0 0 nth nth 512 l 5log2 ------------------- =
psb 2170 detailed register description semiconductor group 226 01.98 a4 h scsts single talk sensitivity sts the parameter sts for a sensitivity se (1/db) can be calculated by the following formula: 15 0 1111 sts sts 2048 se =
psb 2170 detailed register description semiconductor group 227 01.98 a5 h scsttim single talk time mt the parameter mt for a time t (ms) can be calculated by the following formula: note: mt must be greater than 0. 15 0 mt mt 8 t =
psb 2170 detailed register description semiconductor group 228 01.98 a6 h scstis single talk attack speed asp the parameter asp for a speed s (db/ms) can be calculated by the following formula: 15 0 0asp asp 64 s 5log2 ------------------- =
psb 2170 detailed register description semiconductor group 229 01.98 a7 h scstds single talk decay speed dsp the parameter dsp for a speed s (db/ms) can be calculated by the following formula: note: dsp is a negative value (0x7fff = -1) 15 0 1dsp dsp 64 s 5log2 ------------------- =
psb 2170 detailed register description semiconductor group 230 01.98 a8 h sclspn loudspeaker noise nth the parameter nth for a threshold l (db, relative to pcm max. value) can be calculated by the following formula: 15 0 0 nth nth 512 96.3 l + () 5log2 ---------------------------------------- =
psb 2170 detailed register description semiconductor group 231 01.98 a9 h sclsps loudspeaker sensitivity gs the parameter gs for a sensitivity se (1/db) can be calculated by the following formula: 15 0 0gs gs 2028 se =
psb 2170 detailed register description semiconductor group 232 01.98 aa h sclspl loudspeaker limit limit the parameter limit for a level l (db, relative to pcm max. value) can be calculated by the following formula: note: limit must be greater than 0x7ff. 15 0 0 limit limit 512 l 5log2 ------------------- =
psb 2170 detailed register description semiconductor group 233 01.98 ab h sccn1 comfort noise constant level const the parameter const controls the level of the comfort noise. the range is from 0 (off) to 32767 (max.). the parameter has linear behavior. 15 0 0const
psb 2170 detailed register description semiconductor group 234 01.98 ac h sccn2 comfort noise multiplication factor fac the parameter fac for a factor f can be calculated by the following formula: 15 0 0fac fac 2048 f =
psb 2170 detailed register description semiconductor group 235 01.98 ad h sccn3 comfort noise low pass lp the parameter lp for a time constant ts (1/ms) can be calculated by the following formula: 15 0 0lp lp 983.025 ts =
psb 2170 electrical characteristics semiconductor group 236 01.98 6 electrical characteristics electrical characteristics 6.1 absolute maximum ratings esd integrity (according mil-std. 883d, method 3015.7): 2 kv exception: the pins int , sdx, du/dx, dd/dr, sps 0 and sps 1 are not protected against voltage stress >1 kv. note: stresses above those listed here may cause permanent damage to the device. exposure to absolute maximum ratings conditions for extended periods may affect device reliability. 6.2 dc characteristics 1) v ddp must never be fixed to a potential below v dd . parameter symbol limit values unit ambient temperature under bias t a -20 to 85 c storage temperature t stg C 65 to125 c supply voltage v dd -0.5 to 4.2 v supply voltage v dda -0.5 to 4.2 v supply voltage v ddp -0.5 to 6 v voltage of pin with respect to ground: xtal 1 , xtal 2 v s 0 to v dda v voltage on any pin with respect to ground v s if v ddp 1) < 3 v: C 0.4 to v dd + 0.5 if v ddp > 3 v: C 0.4 to v ddp + 0.5 v v dd / v dda = 3.3 v 0.3 v; v ddp = 5 v 10%; v ss / v ssa = 0 v; t a = 0 to 70 c parameter symbo l limit values unit test condition min. typ. max. input leakage current i il C 1.0 1.0 m a0v v in v dd h-input level (except gp 0 -gp 15 , xtal 1 ) v ih1 2.0 v ddp + 0.3 v h-input level (xtal 1 ) v ih2 2.4 v dd v h-input level (gp 0 -gp 15 ) v ih4 2.0 v dd v l-input level (except xtal 1 ) v il1 C 0.3 0.8 v l-input level (xtal 1 ) v il2 00.4v
psb 2170 electrical characteristics semiconductor group 237 01.98 6.3 ac characteristics digital inputs are driven to 2.4 v for a logical 1 and to 0.45 v for a logical 0. timing measurements are made at 2.0 v for a logical 1 and 0.8 v for a logical 0. the ac- testing input/output waveforms are shown below. figure 61 input/output waveforms for ac-tests h-output level (except du/dx, dd/ dr, gp 0 -gp 15 , sps 0 , sps 1 ) v oh1 v dd C 0.45 v i o = 2 ma h-output level (sps 0 , sps 1 , sdx) v oh2 v dd C 0.6 v i o = 2ma h-output level (gp 0 -gp 15 ) v oh3 v dd C 0.45 v i o = 5 ma h-output level (du/dx, dd/dr) v oh4 v dd C 0.6 v i o = 7 ma l-output level (except du/dx, dd/ dr, gp 0 -gp 15 ) v ol1 0.45 v i o = C 2 ma l-output level (gp 0 -gp 15 ) v ol2 0.45 v i o = C 5 ma l-output current (gp 0 -gp 15 ) (after reset) i lo 125 m arst=1 l-output level (du/dx, dd/dr) v ol3 0.45 v i o = C 7 ma input capacitance c i 10 pf output capacitance c o 15 pf v dd supply current (powerdown) i dds1 10 50 m a v dd supply current (operating) i ddo 55 70 ma v dd = 3.3 v v ddp supply current i ddp 110 m a v dd / v dda = 3.3 v 0.3 v; v ddp = 5 v 10%; v ss / v ssa = 0 v; t a = 0 to 70 c parameter symbo l limit values unit test condition min. typ. max.
psb 2170 electrical characteristics semiconductor group 238 01.98 timing dtmf detector parameter symbol limit values unit test condition min. typ. max. frequency deviation accept -1.5 1.5 % frequency deviation reject 3.5 -3.5 % acceptance level -45 0 db rel. to max. pcm rejection level -50 db rel. to max. pcm twist deviation accept +/-2 +/-8 db programmable noise tolerance 12 db signal duration accept 40 ms signal duration reject 19 ms gap duration accept 18 ms caller id decoder parameter symbol limit values unit test condition min. typ. max. frequency deviation accept -2 2 % acceptance level -45 0 db rel. to max. pcm transmission rate 1188 1200 1212 baud noise tolerance 12 db echo cancellation unit (subband mode) subband (hz) filter length (ms) lower limit upper limit submode 1 submode 2 submode 3 0 250 105 130 130 250 750 178 208 208 750 1250 94 113 126 1250 1750 65 84 94 1750 2250 65 84 94 2250 2750 63 71 87 2750 3250 32 40 52 3250 3750 32 40 52
psb 2170 electrical characteristics semiconductor group 239 01.98 alert tone detector parameter symbol limit values unit test condition min. typ. max. frequency deviation accept -0.5 0.5 % atdctl1:dev=0 frequency deviation accept -1.1 1.1 % atdctl1:dev=1 frequency deviation reject 3.5 -3.5 % acceptance level -40 0 db rel. to max. pcm rejection level -5 db rel. to acceptance level twist deviation accept +/-7 db noise tolerance 20 db signal duration accept 75 ms gap duration accept 40 ms atdctl1:gt=0 gap duration accept 12 ms atdctl1:gt=1
psb 2170 electrical characteristics semiconductor group 240 01.98 status register update time the individual bits of the status register may change due to an event (like a recognized dtmf tone) or a command. the timing can be divided into four classes with these definitions the timing of the individual bits in the status register can be given as shown in the following table: timing diagrams 1) one fsc period table 57 status register update timing class timing comment min. max. i 0 0 immediately after command has been issued a0 125 m s 1) command has been accepted d125 m s250 m s deactivation time after command has been issued e - - associated event has happened bit rdy abt cia cd cpt cng dtv atv atc 0->1 aeeeeeeea 1->0 i a a,d e,d e,d d e,d e,d e,d
psb 2170 electrical characteristics semiconductor group 241 01.98 figure 62 oscillator circuit recommended values oscillator circuit value unit min typ max load cl 1 40 pf static capacitance x 1 5pf motional capacitance x 1 17 ff resonance resistor x 1 60 w xtal 1 xtal 2 c l1 c l1 x 1
psb 2170 electrical characteristics semiconductor group 242 01.98 figure 63 ssdi/iom ? -2 interface - bit synchronization timing figure 64 ssdi/iom ? -2 interface - frame synchronization timing parameter ssdi/iom ? -2 interface symbol limit values unit min max dcl period t 1 90 ns dcl high t 2 35 ns dcl low t 3 35 ns input data setup t 4 20 ns dd/dr dcl du/dx du/dx first bit last bit bit n bit n+1 t 4 t 6 t 7 t 8 t 5 t 2 t 1 t 3 fsc dcl t 9 t 10 t 9 t 10
psb 2170 electrical characteristics semiconductor group 243 01.98 input data hold t 5 10 ns output data from high impedance to active (fsc high or other than first timeslot) t 6 30 ns output data from active to high impedance t 7 30 ns output data delay from clock t 8 30 ns fsc setup t 9 40 ns fsc hold t 10 40 ns fsc jitter (deviation per frame) -200 200 ns parameter ssdi/iom ? -2 interface symbol limit values unit min max
psb 2170 electrical characteristics semiconductor group 244 01.98 figure 65 ssdi interface - strobe timing parameter ssdi interface symbol limit values unit min max dxst delay t 1 20 ns drst inactive setup t 2 20 ns drst inactive hold t 3 20 ns drst active setup t 4 20 ns drst active hold t 5 20 ns fsc setup t 6 8 dcl cycles fsc hold t 7 40 ns drst dcl t 4 t 5 t 2 t 3 fsc t 6 t 7 dxst t 1
psb 2170 electrical characteristics semiconductor group 245 01.98 figure 66 sci interface parameter sci interface symbol limit values unit min max sclk cycle time t 1 500 ns sclk high time t 2 100 ns sclk low time t 3 100 ns cs setup time t 4 40 ns cs hold time t 5 10 ns sdr setup time t 6 40 ns sdr hold time t 7 40 ns sdx data out delay t 8 80 ns cs high to sdx tristate t 9 40 ns sclk to sdx active t 10 80 ns sclk to sdx tristate t 11 40 ns cs to int delay t 12 80 ns cs sclk sdr sdx int t 4 t 2 t 3 t 1 t 12 t 10 t 11 t 9 t 5 t 6 t 7 t 8
psb 2170 electrical characteristics semiconductor group 246 01.98 figure 67 analog front end interface parameter afe interface symbol limit values unit min max afeclk period t 1 125 165 ns afeclk high t 2 21/f xtal afeclk low t 3 21/f xtal afedu setup t 4 20 ns afedu hold t 5 20 ns afedd output delay t 6 30 ns afefs output delay t 7 30 ns afedu afeclk afedd bit n bit n+1 t 4 t 6 t 5 t 2 t 1 t 3 afefs t 7 t 7
psb 2170 electrical characteristics semiconductor group 247 01.98 figure 68 general purpose parallel port - multiplex mode parameter general purpose parallel port - multiplex mode symbol limit values unit min typ max active time (gp 0 -gp 15 ) t 1 2ms gap time (gp 0 -gp 15 ) t 2 125 m s data setup time t 3 50 ns data hold time t 4 0ns gp 0 -gp 11 gp 12 t 3 t 4 t 1 t 2 gp 13
psb 2170 electrical characteristics semiconductor group 248 01.98 figure 69 reset timing parameter reset timing symbol limit values unit min max v dd / v ddp / v dda rise time 5%-95% t 1 20 ms supply voltages stable to rst high t 2 0ns supply voltages stable to rst low t 3 0.1 ms rst high time t 4 1000 ns rst t 3 v dd / v ddp t 1 t 2 t 4
psb 2170 package outlines semiconductor group 249 01.98 7 package outlines plastic package, p-mqfp-80 (smd) (plastic metric quad flat package) sorts of packing package outlines for tubes, trays etc. are contained in our data book package information. dimensions in mm smd = surface mounted device
semiconductor group 250 01.98 psb 2170 index a abort clearing event ............................. 100 functional description ................. 73 alert tone detector electrical characteristics ........... 238 functional description ................. 61 registers .............................. 123C124 analog front end interface electrical characteristics ........... 246 functional description ................. 65 registers .............................. 103C109 timing ............................................ 81 c caller id decoder electrical characteristics ........... 238 functional description ................. 62 registers .............................. 125C126 comfort noise adaptation ..................................... 48 generation ..................................... 56 modes ............................................. 47 overview ........................................ 46 cpt detector functional description ................. 59 registers .............................. 127C131 d digital interface functional description ................. 66 mode bit ......................................... 92 modes ............................................. 75 pin mode ........................................ 91 registers .............................. 110C116 dtmf detector electrical characteristics ........... 238 functional description ................. 58 registers ............................. 136C138 dtmf generator functional description ................. 64 registers ............................. 118C122 e equalizer functional description ................. 68 registers ............................. 139C144 g general purpose parallel port electrical characteristics ........... 247 mode bits ....................................... 92 multiplex mode .............................. 87 registers ............................. 162C167 static mode .................................... 87 group listening ................................ 42 h hardware configuration functional description ................. 74 registers ....................................... 91 i interrupt functional description ................. 73 pin mode ........................................ 91 register ....................................... 102 iom?-2 interface electrical characteristics ... 242C243 functional description ................. 75 see also: digital interface
semiconductor group 251 01.98 psb 2170 index l line echo canceller functional description ................. 57 registers .............................. 132C135 o oscillator electrical characteristics ........... 241 mode bits ....................................... 92 p power down functional description ................. 72 status bit ....................................... 91 r reset electrical characteristics ........... 248 functional description ................. 72 restrictions modules ......................................... 74 revision register ........................................ 100 s serial control interface command opcodes ...................... 86 electrical characteristics ........... 245 functional description ................. 83 pin mode ........................................ 91 speakerphone automatic gain control ................ 42 echo suppression ........................ 34 electrical characteristics ........... 238 fullband mode ............................... 30 loudhearing .................................. 42 noisy environment see comfort noise overview ........................................ 29 registers ............................. 168C235 speech comparator ...................... 39 speech detector ........................... 36 subband mode .............................. 32 sps outputs functional description ........... 42, 72 register ....................................... 161 ssdi interface electrical characteristics ... 242C244 functional description ................. 79 see also: digital interface status register definition ....................................... 89 update timing ............................. 240 t tone generator functional description ................. 69 registers ............................. 145C160 u universal attenuator functional description ................. 67 register ....................................... 117

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